Inventor · disambiguated record
Erik S. Jeng
Also filed as: JENG ERIK S · JENG ERIK SYANGYWAN
77 granted patents·8 pending applications·2,994 citations·filing 1996–2012
99Inventor score
Files withVANGUARD INT SEMICONDUCT CORP63APPLIED INTELLECTUAL PROPERTIE10JENG ERIK S3MEGAWIN TECHNOLOGY CO LTD2UNIV CHUNG YUAN CHRISTIAN2
Top patents by PatentIndex Score
85 records- 0196US5792687AMethod for fabricating high density integrated circuits using oxide and polysilicon spacersVANGUARD INT SEMICONDUCT CORP·Filed 1996·Granted Aug 11, 1998·148 cites·23 claims
- 0295US6071789AMethod for simultaneously fabricating a DRAM capacitor and metal interconnectionsVANGUARD INT SEMICONDUCT CORP·Filed 1998·Granted Jun 6, 2000·265 cites·19 claims
- 0394US5895239AMethod for fabricating dynamic random access memory (DRAM) by simultaneous formation of tungsten bit lines and tungsten landing plug contactsVANGUARD INT SEMICONDUCT CORP·Filed 1998·Granted Apr 20, 1999·132 cites·26 claims
- 0494US5688713AMethod of manufacturing a DRAM cell having a double-crown capacitor using polysilicon and nitride spacersVANGUARD INT SEMICONDUCT CORP·Filed 1996·Granted Nov 18, 1997·194 cites·20 claims
- 0593US5893734AMethod for fabricating capacitor-under-bit line (CUB) dynamic random access memory (DRAM) using tungsten landing plug contactsVANGUARD INT SEMICONDUCT CORP·Filed 1998·Granted Apr 13, 1999·112 cites·29 claims
- 0692US6740927B1Nonvolatile memory capable of storing multibits binary information and the method of forming the sameAPPLIED INTELLECTUAL PROPERTIE·Filed 2003·Granted May 25, 2004·56 cites·5 claims
- 0792US6159839AMethod for fabricating borderless and self-aligned polysilicon and metal contact landing plugs for multilevel interconnectionsVANGUARD INT SEMICONDUCT CORP·Filed 1999·Granted Dec 12, 2000·146 cites·24 claims
- 0892US5780338AMethod for manufacturing crown-shaped capacitors for dynamic random access memory integrated circuitsVANGUARD INT SEMICONDUCT CORP·Filed 1997·Granted Jul 14, 1998·118 cites·32 claims
- 0991US5792689AMethod for manufacturing double-crown capacitors self-aligned to node contacts on dynamic random access memoryVANGUARD INT SEMICONDUCT CORP·Filed 1997·Granted Aug 11, 1998·78 cites·20 claims
- 1089US5710073AMethod for forming interconnections and conductors for high density integrated circuitsVANGUARD INT SEMICONDUCT CORP·Filed 1996·Granted Jan 20, 1998·67 cites·24 claims
- 1188US5956594AMethod for simultaneously forming capacitor plate and metal contact structures for a high density DRAM deviceVANGUARD INT SEMICONDUCT CORP·Filed 1998·Granted Sep 21, 1999·106 cites·26 claims
- 1288US5817579ATwo step plasma etch method for forming self aligned contactVANGUARD INT SEMICONDUCT CORP·Filed 1997·Granted Oct 6, 1998·96 cites·19 claims
- 1387US6476488B1Method for fabricating borderless and self-aligned polysilicon and metal contact landing plugs for multilevel interconnectionsVANGUARD INT SEMICONDUCT CORP·Filed 2000·Granted Nov 5, 2002·49 cites·5 claims
- 1487US6136643AMethod for fabricating capacitor-over-bit-line dynamic random access memory (DRAM) using self-aligned contact etching technologyVANGUARD INT SEMICONDUCT CORP·Filed 1999·Granted Oct 24, 2000·76 cites·22 claims
- 1587US5706164AMethod of fabricating high density integrated circuits, containing stacked capacitor DRAM devices, using elevated trench isolation and isolation spacersVANGAURD INTERNATIONAL SEMICON·Filed 1996·Granted Jan 6, 1998·64 cites·29 claims
- 1686US5677227AMethod of fabricating single crown, extendible to triple crown, stacked capacitor structures, using a self-aligned capacitor node contactVANGUARD INT SEMICONDUCT CORP·Filed 1996·Granted Oct 14, 1997·49 cites·21 claims
- 1784US6885072B1Nonvolatile memory with undercut trapping structureAPPLIED INTELLECTUAL PROPERTIE·Filed 2003·Granted Apr 26, 2005·30 cites·28 claims
- 1882US6080620AMethod for fabricating interconnection and capacitors of a DRAM using a simple geometry active area, self-aligned etching, and polysilicon plugsVANGUARD INT SEMICONDUCT CORP·Filed 1998·Granted Jun 27, 2000·54 cites·41 claims
- 1982US5789289AMethod for fabricating vertical fin capacitor structuresVANGUARD INT SEMICONDUCT CORP·Filed 1996·Granted Aug 4, 1998·51 cites·17 claims
- 2080US6376384B1Multiple etch contact etching method incorporating post contact etch etchingVANGUARD INT SEMICONDUCT CORP·Filed 2000·Granted Apr 23, 2002·27 cites·22 claims
- 2179US6903968B2Nonvolatile memory capable of storing multibits binary information and the method of forming the sameAPPLIED INTELLECTUAL PROPERTIE·Filed 2004·Granted Jun 7, 2005·19 cites·9 claims
- 2278US5834359AMethod of forming an isolation region in a semiconductor substrateVANGUARD INT SEMICONDUCT CORP·Filed 1997·Granted Nov 10, 1998·54 cites·16 claims
- 2376US6184081B1Method of fabricating a capacitor under bit line DRAM structure using contact hole linersVANGUARD INT SEMICONDUCT CORP·Filed 1999·Granted Feb 6, 2001·57 cites·26 claims
- 2476US5763312AMethod of fabricating LDD spacers in MOS devices with double spacers and device manufactured therebyVANGUARD INT SEMICONDUCT CORP·Filed 1997·Granted Jun 9, 1998·43 cites·22 claims
- 2575US7375394B2Fringing field induced localized charge trapping memoryAPPLIED INTELLECTUAL PROPERTIE·Filed 2005·Granted May 20, 2008·6 cites·19 claims
- 2674US7235848B2Nonvolatile memory with spacer trapping structureAPPLIED INTELLECTUAL PROPERTIE·Filed 2003·Granted Jun 26, 2007·16 cites·20 claims
- 2772US5804852AStacked capacitor DRAM structure featuring a multiple crown shaped polysilicon lower electrodeVANGUARD INT SEMICONDUCT CORP·Filed 1997·Granted Sep 8, 1998·26 cites·3 claims
- 2871US6306759B1Method for forming self-aligned contact with linerVANGUARD INT SEMICONDUCT CORP·Filed 2000·Granted Oct 23, 2001·19 cites·17 claims
- 2971US5721154AMethod for fabricating a four fin capacitor structureVANGUARD INT SEMICONDUCT CORP·Filed 1996·Granted Feb 24, 1998·40 cites·9 claims
- 3070US6037276AMethod for improving patterning of a conductive layer in an integrated circuitVANGUARD INT SEMICONDUCT CORP·Filed 1997·Granted Mar 14, 2000·36 cites·12 claims
- 3170US5962195AMethod for controlling linewidth by etching bottom anti-reflective coatingVANGUARD INT SEMICONDUCT CORP·Filed 1997·Granted Oct 5, 1999·38 cites·18 claims
- 3269US6033962AMethod of fabricating sidewall spacers for a self-aligned contact holeVANGUARD INT SEMICONDUCT CORP·Filed 1998·Granted Mar 7, 2000·40 cites·25 claims
- 3369US5905293ALDD spacers in MOS devices with double spacersVANGUARD INT SEMICONDUCT CORP·Filed 1998·Granted May 18, 1999·33 cites·17 claims
- 3468US7457154B2High density memory array systemAPPLIED INTELLECTUAL PROPERTIE·Filed 2006·Granted Nov 25, 2008·4 cites·33 claims
- 3568US6037211AMethod of fabricating contact holes in high density integrated circuits using polysilicon landing plug and self-aligned etching processesVANGUARD INT SEMICONDUCT CORP·Filed 1997·Granted Mar 14, 2000·37 cites·19 claims
- 3668US5837576AMethod for forming a capacitor using a silicon oxynitride etching stop layerVANGUARD INT SEMICONDUCT CORP·Filed 1997·Granted Nov 17, 1998·30 cites·8 claims
- 3767US6168987B1Method for fabricating crown-shaped capacitor structuresVANGUARD INT SEMICONDUCT CORP·Filed 1996·Granted Jan 2, 2001·27 cites·11 claims
- 3867US6124192AMethod for fabricating ultra-small interconnections using simplified patterns and sidewall contact plugsVANGUARD INT SEMICONDUCT CORP·Filed 1999·Granted Sep 26, 2000·35 cites·21 claims
- 3966US6150213AMethod of forming a cob dram by using self-aligned node and bit line contact plugVANGUARD INT SEMICONDUCT CORP·Filed 1998·Granted Nov 21, 2000·26 cites·18 claims
- 4065US6767792B1Fabrication method for forming flash memory device provided with adjustable sharp end structure of the L-shaped floating gateMEGAWIN TECHNOLOGY CO LTD·Filed 2003·Granted Jul 27, 2004·12 cites·11 claims
- 4164US5906948AMethod for etching high aspect-ratio multilevel contactsVANGUARD INT SEMICONDUCT CORP·Filed 1998·Granted May 25, 1999·29 cites·15 claims
- 4263US6235621B1Method for forming a semiconductor deviceVANGUARD INT SEMICONDUCT CORP·Filed 1999·Granted May 22, 2001·30 cites·8 claims
- 4363US5658830AMethod for fabricating interconnecting lines and contacts using conformal depositionVANGUARD INT SEMICONDUCT CORP·Filed 1996·Granted Aug 19, 1997·29 cites·22 claims
- 4460US7473599B2Memory capable of storing information and the method of forming and operating the sameJENG ERIK S·Filed 2007·Granted Jan 6, 2009·2 cites·7 claims
- 4560US5968711AMethod of dry etching A1Cu using SiN hard maskVANGUARD INT SEMICONDUCT CORP·Filed 1998·Granted Oct 19, 1999·25 cites·29 claims
- 4659US6649475B1Method of forming twin-spacer gate flash device and the structure of the sameMEGAWIN TECHNOLOGY CO LTD·Filed 2002·Granted Nov 18, 2003·10 cites·19 claims
- 4759US6248643B1Method of fabricating a self-aligned contactVANGUARD INT SEMICONDUCT CORP·Filed 1999·Granted Jun 19, 2001·25 cites·16 claims
- 4859US5904521AMethod of forming a dynamic random access memoryVANGUARD INT SEMICONDUCT CORP·Filed 1997·Granted May 18, 1999·16 cites·19 claims
- 4957US6278189B1High density integrated circuits using tapered and self-aligned contactsVANGUARD INT SEMICONDUCT CORP·Filed 1999·Granted Aug 21, 2001·18 cites·5 claims
- 5057US6265296B1Method for forming self-aligned contacts using a hard maskVANGUARD INT SEMICONDUCT CORP·Filed 1999·Granted Jul 24, 2001·22 cites·5 claims
Showing the top 50 of 85 patent records by PatentIndex Score.
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