Inventor · disambiguated record
Eric Neyret
Also filed as: NEYRET ERIC
24 granted patents·4 pending applications·197 citations·filing 2003–2015
95Inventor score
Files withSOITEC SILICON ON INSULATOR21NEYRET ERIC4BROEKAART MARCEL1MALEVILLE CHRISTOPHE1SCHWARZENBACH WALTER1
Top patents by PatentIndex Score
28 records- 0190US7405136B2Methods for manufacturing compound-material wafers and for recycling used donor substratesSOITEC SILICON ON INSULATOR·Filed 2006·Granted Jul 29, 2008·25 cites·23 claims
- 0286US6962858B2Method for reducing free surface roughness of a semiconductor waferSOITEC SILICON ON INSULATOR·Filed 2003·Granted Nov 8, 2005·45 cites·26 claims
- 0383US8679944B2Progressive trimming methodBROEKAART MARCEL·Filed 2009·Granted Mar 25, 2014·17 cites·17 claims
- 0481US7190029B2Preventive treatment method for a multilayer semiconductor waferSOITEC SILICON ON INSULATOR·Filed 2005·Granted Mar 13, 2007·6 cites·11 claims
- 0580US6853802B2Heat treatment for edges of multilayer semiconductor wafersSOITEC SILICON ON INSULATOR·Filed 2003·Granted Feb 8, 2005·24 cites·19 claims
- 0679US7285471B2Process for transfer of a thin layer formed in a substrate with vacancy clustersSOITEC SILICON ON INSULATOR·Filed 2005·Granted Oct 23, 2007·6 cites·22 claims
- 0776US7514341B2Finishing process for the manufacture of a semiconductor structureSOITEC SILICON ON INSULATOR·Filed 2006·Granted Apr 7, 2009·8 cites·16 claims
- 0873US6939783B2Preventive treatment method for a multilayer semiconductor waferSOITEC SILICON ON INSULATOR·Filed 2004·Granted Sep 6, 2005·13 cites·18 claims
- 0969US7863158B2Treatment for bonding interface stabilizationSOITEC SILICON ON INSULATOR·Filed 2007·Granted Jan 4, 2011·3 cites·33 claims
- 1067US7883628B2Method of reducing the surface roughness of a semiconductor waferSOITEC SILICON ON INSULATOR·Filed 2005·Granted Feb 8, 2011·4 cites·23 claims
- 1167US7485545B2Method of configuring a process to obtain a thin layer with a low density of holesSOITEC SILICON ON INSULATOR·Filed 2006·Granted Feb 3, 2009·4 cites·18 claims
- 1266US7666758B2Process for fabricating a substrate of the silicon-on-insulator type with thin surface layerSOITEC SILICON ON INSULATOR·Filed 2007·Granted Feb 23, 2010·2 cites·20 claims
- 1366US7081399B2Method for producing a high quality useful layer on a substrate utilizing helium and hydrogen implantationsSOITEC SILICON ON INSULATOR·Filed 2003·Granted Jul 25, 2006·14 cites·26 claims
- 1466US6903032B2Method for preparing a semiconductor wafer surfaceSOITEC SILICON ON INSULATOR·Filed 2004·Granted Jun 7, 2005·13 cites·19 claims
- 1561US8389412B2Finishing method for a silicon on insulator substrateSCHWARZENBACH WALTER·Filed 2010·Granted Mar 5, 2013·1 cites·12 claims
- 1661US7749910B2Method of reducing the surface roughness of a semiconductor waferSOITEC SILICON ON INSULATOR·Filed 2005·Granted Jul 6, 2010·2 cites·20 claims
- 1758US7939427B2Process for fabricating a substrate of the silicon-on-insulator type with reduced roughness and uniform thicknessSOITEC SILICON ON INSULATOR·Filed 2007·Granted May 10, 2011·2 cites·15 claims
- 1856US8273636B2Process for the transfer of a thin layer formed in a substrate with vacancy clustersNEYRET ERIC·Filed 2006·Granted Sep 25, 2012·1 cites·24 claims
- 1951US7138344B2Method for minimizing slip line faults on a semiconductor wafer surfaceSOITEC SILICON ON INSULATOR·Filed 2003·Granted Nov 21, 2006·3 cites·20 claims
- 2050US8216916B2Treatment for bonding interface stabilizationNEYRET ERIC·Filed 2007·Granted Jul 10, 2012·0 cites·31 claims
- 2149US8461018B2Treatment for bonding interface stabilizationNEYRET ERIC·Filed 2011·Granted Jun 11, 2013·0 cites·21 claims
- 2247US7049250B2Heat treatment for edges of multilayer semiconductor wafersSOITEC SILICON ON INSULATOR·Filed 2004·Granted May 23, 2006·2 cites·14 claims
- 2347US7001832B2Method for limiting slip lines in a semiconductor substrateSOITEC SILICON ON INSULATOR·Filed 2004·Granted Feb 21, 2006·2 cites·15 claims
- 2446US7947571B2Method for fabricating a semiconductor on insulator substrate with reduced Secco defect densitySOITEC SILICON ON INSULATOR·Filed 2009·Granted May 24, 2011·0 cites·17 claims
- 2545US2006223283A1Method for producing a high quality useful layer on a substrateMALEVILLE CHRISTOPHE·Filed 2006·Application pending·0 cites
- 2645US2015221545A1Method for reducing surface roughness while producing a high quality useful layerSOITEC SILICON ON INSULATOR·Filed 2015·Application pending·0 cites
- 2743US2011117691A1Mixed trimming methodSOITEC SILICON ON INSULATOR·Filed 2009·Application pending·0 cites
- 2832US2007298606A1Chemical-mechanical polishing method and apparatusNEYRET ERIC·Filed 2007·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →