Inventor · disambiguated record
Eric J. Thorne
Also filed as: THORNE ERIC · THORNE ERIC J
10 granted patents·1 pending application·227 citations·filing 2001–2021
90Inventor score
Top patents by PatentIndex Score
11 records- 0194US9372956B1Increased usable programmable device diceXILINX INC·Filed 2014·Granted Jun 21, 2016·24 cites·20 claims
- 0293US6996758B1Apparatus for testing an interconnecting logic fabricXILINX INC·Filed 2001·Granted Feb 7, 2006·56 cites·26 claims
- 0389US7080300B1Testing a programmable logic device with embedded fixed logic using a scan chainXILINX INC·Filed 2004·Granted Jul 18, 2006·38 cites·24 claims
- 0486US6594610B1Fault emulation testing of programmable logic devicesXILINX INC·Filed 2001·Granted Jul 15, 2003·36 cites·24 claims
- 0583US6983405B1Method and apparatus for testing circuitry embedded within a field programmable gate arrayXILINX INC·Filed 2001·Granted Jan 3, 2006·29 cites·21 claims
- 0678US6651238B1Providing fault coverage of interconnect in an FPGAXILINX INC·Filed 2001·Granted Nov 18, 2003·23 cites·20 claims
- 0772US11099169B2Dual pore—control and sensor deviceNOOMA BIO INC·Filed 2018·Granted Aug 24, 2021·1 cites·20 claims
- 0872US7227364B1Test circuit for and method of identifying a defect in an integrated circuitXILINX INC·Filed 2004·Granted Jun 5, 2007·15 cites·20 claims
- 0965US2021405020A1Dual Pore - Control and Sensor DeviceNOOMA BIO INC·Filed 2021·Application pending·0 cites
- 1060US9341668B1Integrated circuit package testingXILINX INC·Filed 2014·Granted May 17, 2016·1 cites·18 claims
- 1160US7373538B1Method for determining interconnect line performance within an integrated circuitXILINX INC·Filed 2005·Granted May 13, 2008·4 cites·10 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →