Inventor · disambiguated record
Eugene Nosowicz
Also filed as: NOSOWICZ EUGENE J · NOSOWICZ EUGENE JAMES
8 granted patents·1 pending application·53 citations·filing 1978–2008
84Inventor score
Files withIBM9
Top patents by PatentIndex Score
9 records- 0176US7425855B2Set/reset latch with minimum single event upsetIBM·Filed 2005·Granted Sep 16, 2008·8 cites·2 claims
- 0276US4153950AData bit assemblerIBM·Filed 1978·Granted May 8, 1979·20 cites·11 claims
- 0359US7103857B2Method and latch circuit for implementing enhanced performance with reduced quiescent power dissipation using mixed threshold CMOS devicesIBM·Filed 2003·Granted Sep 5, 2006·8 cites·16 claims
- 0457US4274017ACascode polarity hold latch having integrated set/reset capabilityIBM·Filed 1978·Granted Jun 16, 1981·9 cites·1 claims
- 0550US6661121B2Pulse generator with controlled output characteristicsIBM·Filed 2001·Granted Dec 9, 2003·5 cites·11 claims
- 0649US7486123B2Set/reset latch with minimum single event upsetIBM·Filed 2008·Granted Feb 3, 2009·1 cites·16 claims
- 0749US7259602B2Method and apparatus for implementing fault tolerant phase locked loop (PLL)IBM·Filed 2005·Granted Aug 21, 2007·2 cites·11 claims
- 0833US2005062511A1Electronic delay elementIBM·Filed 2003·Application pending·0 cites
- 0931US6954086B2Low power data storage element with enhanced noise marginIBM·Filed 2003·Granted Oct 11, 2005·0 cites·9 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →