Inventor · disambiguated record
Fangwen Fu
Also filed as: FU FANGWEN
27 granted patents·41 pending applications·32 citations·filing 2009–2025
93Inventor score
Top patents by PatentIndex Score
68 records- 0196US11842423B2Dot product operations on sparse matrix elementsINTEL CORP·Filed 2020·Granted Dec 12, 2023·4 cites·22 claims
- 0293US10554977B2Method and system of high throughput arithmetic entropy coding for video codingINTEL CORP·Filed 2017·Granted Feb 4, 2020·15 cites·22 claims
- 0391US12242846B2Supporting 8-bit floating point format operands in a computing architectureINTEL CORP·Filed 2024·Granted Mar 4, 2025·1 cites·20 claims
- 0487US2025104180A1Architecture for block sparse operations on a systolic arrayINTEL CORP·Filed 2024·Application pending·0 cites
- 0587US2025166114A1Architecture for block sparse operations on a systolic arrayINTEL CORP·Filed 2024·Application pending·0 cites
- 0685US12198222B2Architecture for block sparse operations on a systolic arrayINTEL CORP·Filed 2023·Granted Jan 14, 2025·0 cites·20 claims
- 0783US12346694B2Register file for systolic arrayINTEL CORP·Filed 2021·Granted Jul 1, 2025·1 cites·20 claims
- 0882US12189571B2Dual pipeline parallel systolic arrayINTEL CORP·Filed 2021·Granted Jan 7, 2025·1 cites·20 claims
- 0980US10291925B2Techniques for hardware video encodingINTEL CORP·Filed 2017·Granted May 14, 2019·3 cites·25 claims
- 1078US11977895B2Hierarchical thread scheduling based on multiple barriersINTEL CORP·Filed 2020·Granted May 7, 2024·1 cites·20 claims
- 1178US2024427842A1Matrix operation optimization mechanismINTEL CORP·Filed 2024·Application pending·0 cites
- 1277US10909653B2Power-based and target-based graphics quality adjustmentINTEL CORP·Filed 2019·Granted Feb 2, 2021·1 cites·6 claims
- 1377US10424082B2Mixed reality coding with overlaysINTEL CORP·Filed 2017·Granted Sep 24, 2019·2 cites·17 claims
- 1477US2025390307A1Register file for systolic arrayINTEL CORP·Filed 2025·Application pending·0 cites
- 1576US12039000B2Matrix operation optimization mechanismINTEL CORP·Filed 2023·Granted Jul 16, 2024·0 cites·19 claims
- 1676US10506255B2MV/mode prediction, ROI-based transmit, metadata capture, and format detection for 360 videoINTEL CORP·Filed 2017·Granted Dec 10, 2019·2 cites·21 claims
- 1773US2025117359A1Dual pipeline parallel systolic arrayINTEL CORP·Filed 2024·Application pending·0 cites
- 1872US2025321736A1Supporting 8-bit floating point format operands in a computing architectureINTEL CORP·Filed 2025·Application pending·0 cites
- 1969US11423507B2Power-based and target-based graphics quality adjustmentINTEL CORP·Filed 2021·Granted Aug 23, 2022·0 cites·24 claims
- 2066US11593454B2Matrix operation optimization mechanismINTEL CORP·Filed 2020·Granted Feb 28, 2023·0 cites·20 claims
- 2164US12399685B2Systolic array having support for output sparsityINTEL CORP·Filed 2021·Granted Aug 26, 2025·0 cites·20 claims
- 2262US10848779B2Temporal motion vector prediction control in video codingINTEL CORP·Filed 2019·Granted Nov 24, 2020·0 cites·25 claims
- 2362US2025291756A1Graphics processor addressable barriersINTEL CORP·Filed 2024·Application pending·0 cites
- 2461US2025292354A1Systolic array matrix accelerator for graphics processing unit applicationsINTEL CORP·Filed 2024·Application pending·0 cites
- 2560US11051038B2MV/mode prediction, ROI-based transmit, metadata capture, and format detection for 360 videoINTEL CORP·Filed 2019·Granted Jun 29, 2021·0 cites·21 claims
- 2659US10872441B2Mixed reality coding with overlaysINTEL CORP·Filed 2019·Granted Dec 22, 2020·0 cites·18 claims
- 2759US10097833B2Method and system of entropy coding using look-up table based probability updating for video codingINTEL CORP·Filed 2014·Granted Oct 9, 2018·1 cites·23 claims
- 2859US2025292365A1Tuning of kernels for on device compilationINTEL CORP·Filed 2025·Application pending·0 cites
- 2959US2025285207A1Tensor core hardware for mixed type microscaling floating point (mxfp) data format calculationsINTEL CORP·Filed 2025·Application pending·0 cites
- 3058US2025292355A1Lossless and lossy automatic hardware compression in graphics-to-graphics network linksINTEL CORP·Filed 2025·Application pending·0 cites
- 3158US2025291590A1Gpu asynchronous matrix multiply accumulate applicationsINTEL CORP·Filed 2024·Application pending·0 cites
- 3258US2025036361A1Floating-point conversion via an integer unitINTEL CORP·Filed 2023·Application pending·0 cites
- 3357US2020059648A1Method and system of high throughput arithmetic entropy coding for video codingINTEL CORP·Filed 2019·Application pending·0 cites
- 3457US2025291550A1Hardware accelerated random number generationINTEL CORP·Filed 2024·Application pending·0 cites
- 3556US10542279B2Temporal motion vector prediction control in video codingINTEL CORP·Filed 2017·Granted Jan 21, 2020·0 cites·20 claims
- 3656US10402932B2Power-based and target-based graphics quality adjustmentINTEL CORP·Filed 2017·Granted Sep 3, 2019·0 cites·15 claims
- 3755US2025147762A1Multiple register allocation sizes for gpu hardware threadsINTEL CORP·Filed 2023·Application pending·0 cites
- 3854US2025110733A1Conversion operations and special value use cases supporting 8-bit floating point format in a graphics architectureINTEL CORP·Filed 2023·Application pending·0 cites
- 3954US2025291731A1Cross-die multi-casting from high bandwidth memory in a graphics processing environmentINTEL CORP·Filed 2025·Application pending·0 cites
- 4052US2020359034A1Techniques for hardware video encodingINTEL CORP·Filed 2020·Application pending·0 cites
- 4151US11729403B2Lossless pixel compression based on inferred control informationINTEL CORP·Filed 2017·Granted Aug 15, 2023·0 cites·25 claims
- 4251US10715818B2Techniques for hardware video encodingINTEL CORP·Filed 2017·Granted Jul 14, 2020·0 cites·25 claims
- 4351US2025036412A1Avoiding the use of a result crossbar when down converting to packed register formatsINTEL CORP·Filed 2023·Application pending·0 cites
- 4451US2024220335A1Synchronization for data multicast in compute core clustersINTEL CORP·Filed 2022·Application pending·0 cites
- 4551US2025110741A1Supporting 8-bit floating point format for parallel computing and stochastic rounding operations in a graphics architectureINTEL CORP·Filed 2023·Application pending·0 cites
- 4651US2024220448A1Scalable and configurable clustered systolic arrayINTEL CORP·Filed 2022·Application pending·0 cites
- 4751US2025068423A1Instruction encoding to implement increased register capacity per threadINTEL CORP·Filed 2023·Application pending·0 cites
- 4851US2024220254A1Data multicast in compute core clustersINTEL CORP·Filed 2022·Application pending·0 cites
- 4951US2025037347A132-bit channel-aligned integer multiplication via multiple multipliers per-channelINTEL CORP·Filed 2023·Application pending·0 cites
- 5050US10924744B2Selective codingINTEL CORP·Filed 2017·Granted Feb 16, 2021·0 cites·25 claims
Showing the top 50 of 68 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →