Inventor · disambiguated record
Fanling H. Yang
Also filed as: YANG FANLING · YANG FANLING H · YANG FANLING HSU
7 granted patents·1 pending application·169 citations·filing 2000–2013
87Inventor score
Top patents by PatentIndex Score
8 records- 0191US9673316B1Vertical semiconductor device having frontside interconnectionsMAXIM INTEGRATED PRODUCTS·Filed 2013·Granted Jun 6, 2017·9 cites·8 claims
- 0287US6303413B1Method of forming a shallow and deep trench isolation (SDTI) suitable for silicon on insulator (SOI) substratesMAXIM INTEGRATED PRODUCTS·Filed 2000·Granted Oct 16, 2001·61 cites·25 claims
- 0384US9450074B1LDMOS with field plate connected to gateYANG FANLING HSU·Filed 2011·Granted Sep 20, 2016·13 cites·8 claims
- 0484US6686250B1Method of forming self-aligned bipolar transistorMAXIM INTEGRATED PRODUCTS·Filed 2002·Granted Feb 3, 2004·38 cites·22 claims
- 0582US6767798B2Method of forming self-aligned NPN transistor with raised extrinsic baseMAXIM INTEGRATED PRODUCTS·Filed 2002·Granted Jul 27, 2004·32 cites·17 claims
- 0677US9209091B1Integrated monolithic galvanic isolatorHARPER DAVID·Filed 2011·Granted Dec 8, 2015·5 cites·6 claims
- 0764US7026666B2Self-aligned NPN transistor with raised extrinsic baseMAXIM INTEGRATED PRODUCTS·Filed 2003·Granted Apr 11, 2006·11 cites·28 claims
- 0831US2002173092A1Forming devices on a semiconductor substrateFiled 2001·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →