Inventor · disambiguated record
Franz Neppl
Also filed as: NEPPL FRANZ
22 granted patents·1,077 citations·filing 1983–1994
97Inventor score
Files withSIEMENS AG22
Top patents by PatentIndex Score
22 records- 0199US4510670AMethod for the manufacture of integrated MOS-field effect transistor circuits silicon gate technology having diffusion zones coated with silicide as low-impedance printed conductorsSIEMENS AG·Filed 1983·Granted Apr 16, 1985·204 cites·14 claims
- 0298US4855245AMethod of manufacturing integrated circuit containing bipolar and complementary MOS transistors on a common substrateSIEMENS AG·Filed 1988·Granted Aug 8, 1989·266 cites·10 claims
- 0395US4761384AForming retrograde twin wells by outdiffusion of impurity ions in epitaxial layer followed by CMOS device processingSIEMENS AG·Filed 1987·Granted Aug 2, 1988·154 cites·16 claims
- 0479US5034338ACircuit containing integrated bipolar and complementary MOS transistors on a common substrateSIEMENS AG·Filed 1989·Granted Jul 23, 1991·30 cites·7 claims
- 0575US4505027AMethod of making MOS device using metal silicides or polysilicon for gates and impurity source for active regionsSIEMENS AG·Filed 1984·Granted Mar 19, 1985·45 cites·21 claims
- 0670US5597766AMethod for detaching chips from a waferSIEMENS AG·Filed 1994·Granted Jan 28, 1997·45 cites·10 claims
- 0770US4912543AIntegrated semiconductor circuit having an external contacting track level consisting of aluminum or of an aluminum alloySIEMENS AG·Filed 1984·Granted Mar 27, 1990·29 cites·5 claims
- 0863US4740479AMethod for the manufacture of cross-couplings between n-channel and p-channel CMOS field effect transistors of static write-read memoriesSIEMENS AG·Filed 1986·Granted Apr 26, 1988·28 cites·9 claims
- 0962US4906585AMethod for manufacturing wells for CMOS transistor circuits separated by insulating trenchesSIEMENS AG·Filed 1988·Granted Mar 6, 1990·28 cites·9 claims
- 1061US4782033AProcess for producing CMOS having doped polysilicon gate by outdiffusion of boron from implanted silicide gateSIEMENS AG·Filed 1986·Granted Nov 1, 1988·34 cites·7 claims
- 1161US4680612AIntegrated semiconductor circuit including a tantalum silicide diffusion barrierSIEMENS AG·Filed 1986·Granted Jul 14, 1987·28 cites·10 claims
- 1260US5013678AMethod of making an integrated circuit comprising load resistors arranged on the field oxide zones which separate the active transistor zonesSIEMENS AG·Filed 1989·Granted May 7, 1991·25 cites·20 claims
- 1359US4525378AMethod for manufacturing VLSI complementary MOS field effect circuitsSIEMENS AG·Filed 1984·Granted Jun 25, 1985·14 cites·7 claims
- 1457US4884117ACircuit containing integrated bipolar and complementary MOS transistors on a common substrateSIEMENS AG·Filed 1989·Granted Nov 28, 1989·13 cites·3 claims
- 1556US4885617AMetal-oxide semiconductor (MOS) field effect transistor having extremely shallow source/drain zones and silicide terminal zones, and a process for producing the transistor circuitSIEMENS AG·Filed 1987·Granted Dec 5, 1989·28 cites·5 claims
- 1653US4960489AMethod for self-aligned manufacture of contacts between interconnects contained in wiring levels arranged above one another in an integrated circuitSIEMENS AG·Filed 1989·Granted Oct 2, 1990·20 cites·10 claims
- 1752US4673968AIntegrated MOS transistors having a gate metallization composed of tantalum or niobium or their silicidesSIEMENS AG·Filed 1986·Granted Jun 16, 1987·18 cites·5 claims
- 1851US4874717ASemiconductor circuit containing integrated bipolar and MOS transistors on a chip and method of producing sameSIEMENS AG·Filed 1988·Granted Oct 17, 1989·13 cites·11 claims
- 1950US4640844AMethod for the manufacture of gate electrodes formed of double layers of metal silicides having a high melting point and doped polycrystalline siliconSIEMENS AG·Filed 1985·Granted Feb 3, 1987·18 cites·10 claims
- 2045US4803179AMethods for making neighboring wells for VLS1 CMOS componentsSIEMENS AG·Filed 1987·Granted Feb 7, 1989·16 cites·4 claims
- 2142US5100811AIntegrated circuit containing bi-polar and complementary mos transistors on a common substrate and method for the manufacture thereofSIEMENS AG·Filed 1990·Granted Mar 31, 1992·13 cites·19 claims
- 2237US4603472AMethod of making MOS FETs using silicate glass layer as gate edge masking for ion implantationSIEMENS AG·Filed 1985·Granted Aug 5, 1986·8 cites·9 claims
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