Inventor · disambiguated record
Garry P. Epps
Also filed as: EPPS GARRY · EPPS GARRY P · EPPS GARRY PAUL
25 granted patents·1,496 citations·filing 1997–2011
98Inventor score
Top patents by PatentIndex Score
25 records- 0198US6977930B1Pipelined packet switching and queuing architectureCISCO TECH IND·Filed 2000·Granted Dec 20, 2005·193 cites·37 claims
- 0297US7643486B2Pipelined packet switching and queuing architectureCISCO TECH INC·Filed 2005·Granted Jan 5, 2010·86 cites·46 claims
- 0397US6980552B1Pipelined packet switching and queuing architectureCISCO TECH IND·Filed 2002·Granted Dec 27, 2005·196 cites·33 claims
- 0497US6721316B1Flexible engine and data structure for packet header processingCISCO TECH IND·Filed 2000·Granted Apr 13, 2004·207 cites·24 claims
- 0596US7715419B2Pipelined packet switching and queuing architectureCISCO TECH INC·Filed 2006·Granted May 11, 2010·45 cites·18 claims
- 0696US6813243B1High-speed hardware implementation of red congestion control algorithmCISCO TECH IND·Filed 2000·Granted Nov 2, 2004·142 cites·18 claims
- 0796US6778546B1High-speed hardware implementation of MDRR algorithm over a large number of queuesCISCO TECH IND·Filed 2000·Granted Aug 17, 2004·169 cites·23 claims
- 0895US7792027B2Pipelined packet switching and queuing architectureCISCO TECH INC·Filed 2006·Granted Sep 7, 2010·30 cites·18 claims
- 0994US7809009B2Pipelined packet switching and queuing architectureCISCO TECH INC·Filed 2006·Granted Oct 5, 2010·26 cites·20 claims
- 1094US7177276B1Pipelined packet switching and queuing architectureCISCO TECH INC·Filed 2002·Granted Feb 13, 2007·88 cites·27 claims
- 1193US8018937B2Pipelined packet switching and queuing architectureCISCO TECH INC·Filed 2005·Granted Sep 13, 2011·21 cites·32 claims
- 1293US6731644B1Flexible DMA engine for packet header modificationCISCO TECH IND·Filed 2000·Granted May 4, 2004·99 cites·17 claims
- 1392US7864791B2Pipelined packet switching and queuing architectureCISCO TECH INC·Filed 2007·Granted Jan 4, 2011·20 cites·19 claims
- 1491US7835649B2Optical data synchronization schemeCISCO TECH INC·Filed 2006·Granted Nov 16, 2010·16 cites·29 claims
- 1590US8571024B2Pipelined packet switching and queuing architectureTATAR MOHAMMED I·Filed 2010·Granted Oct 29, 2013·17 cites·19 claims
- 1689US7729351B2Pipelined packet switching and queuing architectureCISCO TECH INC·Filed 2006·Granted Jun 1, 2010·13 cites·30 claims
- 1788US7310695B2Port adapter for high-bandwidth busCISCO TECH INC·Filed 2006·Granted Dec 18, 2007·14 cites·36 claims
- 1880US8665875B2Pipelined packet switching and queuing architectureEPPS GARRY P·Filed 2011·Granted Mar 4, 2014·5 cites·20 claims
- 1980US7554907B1High-speed hardware implementation of RED congestion control algorithmCISCO TECH INC·Filed 2004·Granted Jun 30, 2009·24 cites·50 claims
- 2079US7111102B2Port adapter for high-bandwidth busCISCO TECH INC·Filed 2003·Granted Sep 19, 2006·26 cites·21 claims
- 2178US7881617B2Buffering schemes for optical packet processingCISCO TECH INC·Filed 2006·Granted Feb 1, 2011·6 cites·35 claims
- 2268US8000251B2Instrumenting packet flowsCISCO TECH INC·Filed 2007·Granted Aug 16, 2011·4 cites·19 claims
- 2368US7286525B1Synchronous pipelined switch using serial transmissionCISCO TECH INC·Filed 2002·Granted Oct 23, 2007·10 cites·53 claims
- 2458US6424649B1Synchronous pipelined switch using serial transmissionCISCO TECH IND·Filed 1997·Granted Jul 23, 2002·35 cites·11 claims
- 2557US7433988B2Port adapter for high-bandwidth busCISCO TECH INC·Filed 2007·Granted Oct 7, 2008·4 cites·35 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →