Inventor · disambiguated record
Gary A. Gibson
Also filed as: GIBSON GARY A · GIBSON GARY ALLEN
12 granted patents·3 pending applications·1,219 citations·filing 1990–2014
95Inventor score
Technology areasG06F
Top patents by PatentIndex Score
15 records- 0197US5487156AProcessor architecture having independently fetching issuing and updating operations of instructions which are sequentially assigned and stored in order fetchedFiled 1990·Granted Jan 23, 1996·271 cites·36 claims
- 0294US5625837AProcessor architecture having out-of-order execution, speculative branching, and giving priority to instructions which affect a condition codeHYUNDAI ELECTRONICS AMERICA·Filed 1995·Granted Apr 29, 1997·165 cites·5 claims
- 0394US5561776AProcessor architecture supporting multiple speculative branchingHYUNDAI ELECTRONICS AMERICA·Filed 1995·Granted Oct 1, 1996·156 cites·55 claims
- 0493US8782653B2Fine grain performance resource management of computer systemsGIBSON GARY ALLEN·Filed 2011·Granted Jul 15, 2014·27 cites·39 claims
- 0592US8677071B2Control of processor cache memory occupancyGIBSON GARY ALLEN·Filed 2011·Granted Mar 18, 2014·20 cites·43 claims
- 0691US5708841AProcessor architecture providing speculative, out of order execution of instructionsHYUNDAI ELECTRONICS AMERICA·Filed 1996·Granted Jan 13, 1998·112 cites·19 claims
- 0791US5627983AProcessor architecture providing out-of-order executionHYUNDAI ELECTRONICS AMERICA·Filed 1995·Granted May 6, 1997·118 cites·18 claims
- 0891US5592636AProcessor architecture supporting multiple speculative branches and trap handlingHYUNDAI ELECTRONICS AMERICA·Filed 1995·Granted Jan 7, 1997·115 cites·16 claims
- 0989US8397236B2Credit based performance managment of computer systemsGIBSON GARY A·Filed 2008·Granted Mar 12, 2013·22 cites·56 claims
- 1089US5832293AProcessor architecture providing speculative, out of order execution of instructions and trap handlingHYUNDAI ELECTRONICS AMERICA·Filed 1997·Granted Nov 3, 1998·100 cites·12 claims
- 1188US5797025AProcessor architecture supporting speculative, out of order execution of instructions including multiple speculative branchingHYUNDAI ELECTRONICS AMERICA·Filed 1996·Granted Aug 18, 1998·97 cites·17 claims
- 1254US5987588AProcessor architecture providing for speculative execution of instructions with multiple predictive branching and handling of trap conditionsHYUNDAI ELECTRONICS AMERICA·Filed 1998·Granted Nov 16, 1999·16 cites·8 claims
- 1354US2014331234A1Task-Based Performance Resource Management of Computer SystemsVIRTUALMETRIX INC·Filed 2014·Application pending·0 cites
- 1453US2014201456A1Control Of Processor Cache Memory OccupancyVIRTUALMETRIX INC·Filed 2014·Application pending·0 cites
- 1551US2013191841A1Method and Apparatus For Fine Grain Performance Management of Computer SystemsVIRTUALMETRIX INC·Filed 2013·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →