Inventor · disambiguated record
Gayvin Stong
Also filed as: STONG GAYVIN E · STONG GAYVIN EARL
14 granted patents·1 pending application·201 citations·filing 1990–2005
92Inventor score
Files withAGILENT TECHNOLOGIES INC11AVAGO TECHNOLOGIES GENERAL IP1FAOUR FOUAD A1HEWLETT PACKARD CO1STONG GAYVIN E1
Top patents by PatentIndex Score
15 records- 0184US6188260B1Master-slave flip-flop and methodAGILENT TECHNOLOGIES INC·Filed 1999·Granted Feb 13, 2001·60 cites·4 claims
- 0276US6857113B2Process and system for identifying wires at risk of electromigrationAGILENT TECHNOLOGIES INC·Filed 2002·Granted Feb 15, 2005·31 cites·26 claims
- 0374US5068881AScannable register with delay test capabilityHEWLETT PACKARD CO·Filed 1990·Granted Nov 26, 1991·28 cites·26 claims
- 0471US6918073B2Differential self-test of input/output circuitsAGILENT TECHNOLOGIES INC·Filed 2002·Granted Jul 12, 2005·18 cites·39 claims
- 0567US6982575B2Clock ratio data synchronizerAGILENT TECHNOLOGIES INC·Filed 2002·Granted Jan 3, 2006·13 cites·17 claims
- 0664US6895061B1Scannable synchronizer having a deceased resolving timeAGILENT TECHNOLOGIES INC·Filed 1999·Granted May 17, 2005·20 cites·14 claims
- 0757US6807658B2Systems and methods for performing clock gating checksAGILENT TECHNOLOGIES INC·Filed 2002·Granted Oct 19, 2004·6 cites·28 claims
- 0856US6769101B2Systems and methods providing scan-based delay test generationAGILENT TECHNOLOGIES INC·Filed 2002·Granted Jul 27, 2004·7 cites·11 claims
- 0949US6760893B2Using transition time checks to determine noise problems on signal lines of an integrated circuitAGILENT TECHNOLOGIES INC·Filed 2001·Granted Jul 6, 2004·1 cites·20 claims
- 1047US6978406B2System and method for testing memory arraysAGILENT TECHNOLOGIES INC·Filed 2002·Granted Dec 20, 2005·6 cites·25 claims
- 1144US6721931B2System and method for simplifying clock construction and analysisAGILENT TECHNOLOGIES INC·Filed 2002·Granted Apr 13, 2004·2 cites·20 claims
- 1243US7257751B2Apparatus and method for random pattern built in self-testSTONG GAYVIN E·Filed 2001·Granted Aug 14, 2007·6 cites·17 claims
- 1343US6775116B2Method and apparatus for preventing buffers from being damaged by electrical charges collected on lines connected to the buffersAGILENT TECHNOLOGIES INC·Filed 2001·Granted Aug 10, 2004·2 cites·19 claims
- 1438US7556971B2Testing electromigration at multiple points of a single nodeAVAGO TECHNOLOGIES GENERAL IP·Filed 2005·Granted Jul 7, 2009·1 cites·13 claims
- 1533US2007044046A1Method for providing a current sink model for an asicFAOUR FOUAD A·Filed 2005·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →