Inventor · disambiguated record
Gerard M. Blair
Also filed as: BLAIR GERARD M
9 granted patents·1 pending application·340 citations·filing 1974–2012
88Inventor score
Files withHEWLETT PACKARD DEVELOPMENT CO3WESTINGHOUSE ELECTRIC CORP2BLAIR GERARD M1GASPER MARTIN J1HEWLETT PACKARD CO1
Top patents by PatentIndex Score
10 records- 0192US4006460AComputer controlled security systemWESTINGHOUSE ELECTRIC CORP·Filed 1974·Granted Feb 1, 1977·252 cites·4 claims
- 0283US6323714B1System and method for deskewing synchronous clocks in a very large scale integrated circuitHEWLETT PACKARD CO·Filed 2000·Granted Nov 27, 2001·50 cites·24 claims
- 0369US7944284B2System and circuit for a virtual power gridLSI CORP·Filed 2009·Granted May 17, 2011·6 cites·20 claims
- 0468US8461893B2Uniform-footprint programmable multi-stage delay cellGASPER MARTIN J·Filed 2011·Granted Jun 11, 2013·4 cites·28 claims
- 0563US6654712B1Method to reduce skew in clock signal distribution using balanced wire widthsHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Nov 25, 2003·11 cites·16 claims
- 0652US8271922B2System and method for clock optimization to achieve timing signoff in an electronic circuit and electronic design automation tool incorporating the sameZAHN BRUCE E·Filed 2009·Granted Sep 18, 2012·1 cites·20 claims
- 0749US6617900B1Arbitrator with no metastable voltage levels on outputHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Sep 9, 2003·5 cites·18 claims
- 0847US3991362ATechnique for monitoring the operational integrity of remote analog circuitsWESTINGHOUSE ELECTRIC CORP·Filed 1975·Granted Nov 9, 1976·9 cites·3 claims
- 0941US6591371B1System for counting a number of clock cycles such that a count signal is diverted from a cascaded series of write latches to a cascaded series of erase latchesHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Jul 8, 2003·2 cites·23 claims
- 1041US2014059505A1Method for designing integrated circuits employing correct-by-construction progressive modeling and an apparatus employing the methodBLAIR GERARD M·Filed 2012·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →