Inventor · disambiguated record
George Cai
Also filed as: CAI GEORGE · CAI GEORGE Z N
9 granted patents·1 pending application·618 citations·filing 1997–2005
91Inventor score
Top patents by PatentIndex Score
10 records- 0189US6216219B1Microprocessor circuits, systems, and methods implementing a load target buffer with entries relating to prefetch desirabilityTEXAS INSTRUMENTS INC·Filed 1997·Granted Apr 10, 2001·172 cites·34 claims
- 0283US5953512AMicroprocessor circuits, systems, and methods implementing a loop and/or stride predicting load target bufferTEXAS INSTRUMENTS INC·Filed 1997·Granted Sep 14, 1999·114 cites·17 claims
- 0382US6108775ADynamically loadable pattern history tables in a multi-task microprocessorTEXAS INSTRUMENTS INC·Filed 1997·Granted Aug 22, 2000·107 cites·32 claims
- 0481US6029228AData prefetching of a load target buffer for post-branch instructions based on past prediction accuracy's of branch predictionsTEXAS INSTRUMENTS INC·Filed 1997·Granted Feb 22, 2000·98 cites·36 claims
- 0580US5935241AMultiple global pattern history tables for branch prediction in a microprocessorTEXAS INSTRUMENTS INC·Filed 1997·Granted Aug 10, 1999·95 cites·24 claims
- 0660US7689778B2Preventing system snoop and cross-snoop conflictsINTEL CORP·Filed 2004·Granted Mar 30, 2010·7 cites·18 claims
- 0760US7353338B2Credit mechanism for multiple banks of shared cacheINTEL CORP·Filed 2005·Granted Apr 1, 2008·2 cites·30 claims
- 0849US5909566AMicroprocessor circuits, systems, and methods for speculatively executing an instruction using its most recently used data while concurrently prefetching data for the instructionTEXAS INSTRUMENTS INC·Filed 1997·Granted Jun 1, 1999·23 cites·18 claims
- 0947US9727468B2Resolving multi-core shared cache access conflictsSISTLA KRISHNAKANTH V·Filed 2005·Granted Aug 8, 2017·0 cites·6 claims
- 1045US2006053258A1Cache filtering using core indicatorsLIU YEN-CHENG·Filed 2004·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →