Inventor · disambiguated record
Geoffrey B. Stephens
Also filed as: STEPHENS GEOFFREY · STEPHENS GEOFFREY B · STEPHENS GEOFFREY BROWNELL
23 granted patents·1 pending application·601 citations·filing 1977–2024
97Inventor score
Top patents by PatentIndex Score
24 records- 0197US4201800AHardened photoresist master image mask processIBM·Filed 1978·Granted May 6, 1980·123 cites·1 claims
- 0289US6031394ALow voltage CMOS circuit for on/off chip drive at high voltageIBM·Filed 1998·Granted Feb 29, 2000·67 cites·16 claims
- 0382US6275094B1CMOS device and circuit and method of operation dynamically controlling threshold voltageIBM·Filed 1999·Granted Aug 14, 2001·40 cites·16 claims
- 0479US4172004AMethod for forming dense dry etched multi-level metallurgy with non-overlapped viasIBM·Filed 1977·Granted Oct 23, 1979·35 cites·6 claims
- 0577US4404577AElectrically alterable read only memory cellIBM·Filed 1980·Granted Sep 13, 1983·29 cites·3 claims
- 0676US5424659AMixed voltage output buffer circuitIBM·Filed 1994·Granted Jun 13, 1995·31 cites·8 claims
- 0773US4357178ASchottky barrier diode with controlled characteristics and fabrication methodIBM·Filed 1980·Granted Nov 2, 1982·26 cites·4 claims
- 0873US4314267ADense high performance JFET compatible with NPN transistor formation and merged BIFETIBM·Filed 1980·Granted Feb 2, 1982·25 cites·3 claims
- 0972US4481566AOn chip charge trap compensated high voltage converterIBM·Filed 1983·Granted Nov 6, 1984·20 cites·3 claims
- 1072US4289834ADense dry etched multi-level metallurgy with non-overlapped viasIBM·Filed 1979·Granted Sep 15, 1981·27 cites·1 claims
- 1171US2025322924A1Using Machine Learning to Predict Cell Therapy CharacteristicsAICELLA INC·Filed 2024·Application pending·0 cites
- 1265US5453705AReduced power VLSI chip and driver circuitIBM·Filed 1993·Granted Sep 26, 1995·21 cites·2 claims
- 1365US4458407AProcess for fabricating semi-conductive oxide between two poly silicon gate electrodesIBM·Filed 1983·Granted Jul 10, 1984·20 cites·14 claims
- 1463US4110126ANPN/PNP Fabrication process with improved alignmentIBM·Filed 1977·Granted Aug 29, 1978·22 cites·6 claims
- 1559US4412376AFabrication method for vertical PNP structure with Schottky barrier diode emitter utilizing ion implantationIBM·Filed 1982·Granted Nov 1, 1983·25 cites·3 claims
- 1657US4229753AVoltage compensation of temperature coefficient of resistance in an integrated circuit resistorIBM·Filed 1977·Granted Oct 21, 1980·17 cites·4 claims
- 1755US4395812AForming an integrated circuitIBM·Filed 1981·Granted Aug 2, 1983·12 cites·5 claims
- 1854US4373166ASchottky Barrier diode with controlled characteristicsIBM·Filed 1980·Granted Feb 8, 1983·15 cites·7 claims
- 1952US4157268ALocalized oxidation enhancement for an integrated injection logic circuitIBM·Filed 1977·Granted Jun 5, 1979·13 cites·9 claims
- 2048US4429237AHigh voltage on chip FET driverIBM·Filed 1981·Granted Jan 31, 1984·9 cites·14 claims
- 2140US4656729ADual electron injection structure and process with self-limiting oxidation barrierIBM·Filed 1985·Granted Apr 14, 1987·11 cites·11 claims
- 2240US4326212AStructure and process for optimizing the characteristics of I2 L devicesIBM·Filed 1979·Granted Apr 20, 1982·5 cites·2 claims
- 2335US5939897AMethod and apparatus for testing quiescent current in integrated circuitsIBM·Filed 1998·Granted Aug 17, 1999·5 cites·4 claims
- 2431US5760598AMethod and apparatus for testing quiescent current in integrated circuitsIBM·Filed 1996·Granted Jun 2, 1998·3 cites·6 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →