Inventor · disambiguated record
Gilles Gervais
Also filed as: GERVAIS GILLES
20 granted patents·3 pending applications·222 citations·filing 1993–2012
95Inventor score
Top patents by PatentIndex Score
23 records- 0193US7447602B1System and method for sorting processors based on thermal design pointIBM·Filed 2007·Granted Nov 4, 2008·27 cites·20 claims
- 0292US8381006B2Reducing power requirements of a multiple core processorIBM·Filed 2010·Granted Feb 19, 2013·16 cites·20 claims
- 0379US7486096B2Method and apparatus for testing to determine minimum operating voltages in electronic devicesIBM·Filed 2006·Granted Feb 3, 2009·9 cites·20 claims
- 0478US8341434B2Optimizing voltage on a power plane using a networked voltage regulation module arrayGERVAIS GILLES·Filed 2008·Granted Dec 25, 2012·9 cites·12 claims
- 0578US6792554B2Method and system for synchronously transferring data between clock domains sourced by the same clockIBM·Filed 2000·Granted Sep 14, 2004·27 cites·20 claims
- 0675US7890782B2Dynamic power management in an execution unit using pipeline wave flow controlIBM·Filed 2008·Granted Feb 15, 2011·5 cites·12 claims
- 0775US7739573B2Voltage identifier sortingIBM·Filed 2007·Granted Jun 15, 2010·7 cites·20 claims
- 0874US7716516B2Method for controlling operation of microprocessor which performs duty cycle correction processSONY COMPUTER ENTERTAINMENT INC·Filed 2006·Granted May 11, 2010·6 cites·20 claims
- 0974US7610531B2Modifying a test pattern to control power supply noiseIBM·Filed 2006·Granted Oct 27, 2009·7 cites·21 claims
- 1066US7917347B2Generating a worst case current waveform for testing of integrated circuit devicesIBM·Filed 2007·Granted Mar 29, 2011·3 cites·20 claims
- 1161US7469357B2Method and apparatus for dynamic power management in an execution unit using pipeline wave flow controlIBM·Filed 2006·Granted Dec 23, 2008·2 cites·6 claims
- 1257US6636980B1System for launching data on a bus by using first clock for alternately selecting data from two data streams and using second clock for launching data thereafterIBM·Filed 1999·Granted Oct 21, 2003·34 cites·24 claims
- 1355US6327680B1Method and apparatus for array redundancy repair detectionIBM·Filed 1999·Granted Dec 4, 2001·20 cites·14 claims
- 1452US7137013B2Method and apparatus for dynamic power management in an execution unit using pipeline wave flow controlIBM·Filed 2002·Granted Nov 14, 2006·3 cites·10 claims
- 1551US6550013B1Memory clock generator and method thereforIBM·Filed 1999·Granted Apr 15, 2003·24 cites·24 claims
- 1650US5448725AApparatus and method for error detection and fault isolationIBM·Filed 1994·Granted Sep 5, 1995·21 cites·10 claims
- 1748US8607080B2Optimizing voltage on a power plane using a host control unit to control a networked voltage regulation module arrayGERVAIS GILLES·Filed 2012·Granted Dec 10, 2013·0 cites·2 claims
- 1843US2008189090A1System and Method for Determining a Guard Band for an Operating Voltage of an Integrated Circuit DeviceAIKAWA MAKOTO·Filed 2007·Application pending·0 cites
- 1943US2008021692A1Method for performing power simulations on complex designs running complex software applicationsCHAUDHRY RAJAT·Filed 2006·Application pending·0 cites
- 2040US6934729B2Method and system for performing shift operationsIBM·Filed 2001·Granted Aug 23, 2005·0 cites·30 claims
- 2138US2008092006A1Optimizing a Set of LBIST Patterns to Enhance Delay Fault CoverageDAKWALA NIKHIL·Filed 2006·Application pending·0 cites
- 2237US6820227B2Method and apparatus for performing error checkingIBM·Filed 2001·Granted Nov 16, 2004·0 cites·16 claims
- 2329US5694400AChecking data integrity in buffered data transmissionIBM·Filed 1993·Granted Dec 2, 1997·2 cites·4 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →