Inventor · disambiguated record
Gi-Joon Nam
Also filed as: NAM GI-JOON
82 granted patents·18 pending applications·681 citations·filing 2002–2023
99Inventor score
Top patents by PatentIndex Score
100 records- 0194US8635577B2Timing refinement re-routingKAZDA MICHAEL ANTHONY·Filed 2012·Granted Jan 21, 2014·87 cites·17 claims
- 0294US8242358B2Micro coaxial cable for high bending performancePARK CHAN-YONG·Filed 2007·Granted Aug 14, 2012·220 cites·12 claims
- 0393US8677299B1Latch clustering with proximity to local clock buffersIBM·Filed 2013·Granted Mar 18, 2014·22 cites·17 claims
- 0492US11120192B1White space insertion for enhanced routabilityIBM·Filed 2020·Granted Sep 14, 2021·5 cites·20 claims
- 0592US10223496B2Triple and quad coloring shape layoutsIBM·Filed 2017·Granted Mar 5, 2019·7 cites·9 claims
- 0692US8954912B2Structured placement of latches/flip-flops to minimize clock power in high-performance designsIBM·Filed 2012·Granted Feb 10, 2015·18 cites·25 claims
- 0792US8495548B2Multi-patterning lithography aware cell placement in integrated circuit designAGARWAL KANAK BEHARI·Filed 2011·Granted Jul 23, 2013·22 cites·20 claims
- 0890US7624366B2Clock aware placementIBM·Filed 2006·Granted Nov 24, 2009·27 cites·34 claims
- 0989US11356275B2Electronically verifying a process flowIBM·Filed 2020·Granted Jun 7, 2022·3 cites·18 claims
- 1089US10417375B2Time-driven placement and/or cloning of components for an integrated circuitIBM·Filed 2017·Granted Sep 17, 2019·5 cites·14 claims
- 1188US8782584B2Post-placement cell shiftingIBM·Filed 2013·Granted Jul 15, 2014·10 cites·1 claims
- 1287US10528695B1Integer arithmetic method for wire length minimization in global placement with convolution based density penalty computationIBM·Filed 2018·Granted Jan 7, 2020·5 cites·20 claims
- 1386US10558775B2Memory element graph-based placement in integrated circuit designIBM·Filed 2017·Granted Feb 11, 2020·4 cites·17 claims
- 1486US9417945B2Error checking and correction for NAND flash devicesIBM·Filed 2014·Granted Aug 16, 2016·8 cites·16 claims
- 1586US8667441B2Clock optimization with local clock buffer control optimizationALPERT CHARLES J·Filed 2010·Granted Mar 4, 2014·10 cites·20 claims
- 1686US7934188B2Legalization of VLSI circuit placement with blockages using hierarchical row slicingIBM·Filed 2008·Granted Apr 26, 2011·16 cites·18 claims
- 1785US9298872B2Apportioning synthesis effort for better timing closureIBM·Filed 2014·Granted Mar 29, 2016·7 cites·21 claims
- 1884US10354183B2Power-driven synthesis under latency constraintsIBM·Filed 2014·Granted Jul 16, 2019·5 cites·18 claims
- 1983US12423502B2Rule check heatmap predictionIBM·Filed 2022·Granted Sep 23, 2025·1 cites·20 claims
- 2083US7897874B2Foam coaxial cable and method for manufacturing the sameLS CABLE LTD·Filed 2007·Granted Mar 1, 2011·11 cites·14 claims
- 2182US11314920B2Time-driven placement and/or cloning of components for an integrated circuitIBM·Filed 2020·Granted Apr 26, 2022·1 cites·20 claims
- 2282US8826215B1Routing centric design closureIBM·Filed 2013·Granted Sep 2, 2014·6 cites·18 claims
- 2382US8458634B2Latch clustering with proximity to local clock buffersALPERT CHARLES JAY·Filed 2010·Granted Jun 4, 2013·7 cites·17 claims
- 2482US7507910B2Asymmetrical separator and communication cable having the sameLS CABLE LTD·Filed 2007·Granted Mar 24, 2009·10 cites·4 claims
- 2582US7467369B2Constrained detailed placementIBM·Filed 2006·Granted Dec 16, 2008·13 cites·8 claims
- 2679US8930873B1Creating regional routing blockages in integrated circuit designIBM·Filed 2013·Granted Jan 6, 2015·5 cites·20 claims
- 2779US8595675B1Local objective optimization in global placement of an integrated circuit designALPERT CHARLES J·Filed 2012·Granted Nov 26, 2013·5 cites·12 claims
- 2879US8495534B2Post-placement cell shiftingALPERT CHARLES J·Filed 2010·Granted Jul 23, 2013·5 cites·23 claims
- 2978US12438727B1Tracing and verifying a shared library using blockchainIBM·Filed 2021·Granted Oct 7, 2025·1 cites·20 claims
- 3077US10552740B2Fault-tolerant power-driven synthesisIBM·Filed 2014·Granted Feb 4, 2020·7 cites·20 claims
- 3177US8347257B2Detailed routability by cell placementIBM·Filed 2010·Granted Jan 1, 2013·5 cites·24 claims
- 3277US7882475B2Method to reduce the wirelength of analytical placement techniques by modulation of spreading forces vectorsIBM·Filed 2008·Granted Feb 1, 2011·8 cites·3 claims
- 3377US7541542B2Micro coaxial cableLS CABLE LTD·Filed 2007·Granted Jun 2, 2009·8 cites·7 claims
- 3477US6671867B2Analytical constraint generation for cut-based global placementIBM·Filed 2002·Granted Dec 30, 2003·23 cites·21 claims
- 3575US11629246B2Power cableLS CABLE & SYSTEM LTD·Filed 2019·Granted Apr 18, 2023·1 cites·9 claims
- 3673US7399926B2Communication cable having outside spacer and method for producing the sameLS CABLE LTD·Filed 2006·Granted Jul 15, 2008·6 cites·12 claims
- 3772US10796064B2Autonomous placement to satisfy self-aligned double patterning constraintsIBM·Filed 2018·Granted Oct 6, 2020·1 cites·20 claims
- 3872US8418108B2Accuracy pin-slew mode for gate delay calculationALPERT CHARLES J·Filed 2011·Granted Apr 9, 2013·3 cites·15 claims
- 3972US7296252B2Clustering techniques for faster and better placement of VLSI circuitsIBM·Filed 2004·Granted Nov 13, 2007·17 cites·18 claims
- 4071US11763963B2Power cableLS CABLE & SYSTEM LTD·Filed 2019·Granted Sep 19, 2023·1 cites·8 claims
- 4171US10762271B2Model-based refinement of the placement process in integrated circuit generationIBM·Filed 2018·Granted Sep 1, 2020·1 cites·20 claims
- 4271US10635773B1Enhancing stability of half perimeter wire length (HPWL)-driven analytical placementIBM·Filed 2018·Granted Apr 28, 2020·1 cites·20 claims
- 4370US7073144B2Stability metrics for placement to quantify the stability of placement algorithmsIBM·Filed 2004·Granted Jul 4, 2006·14 cites·27 claims
- 4470US7020861B2Latch placement technique for reduced clock signal skewIBM·Filed 2003·Granted Mar 28, 2006·16 cites·16 claims
- 4569US8909015B2Composition for high strength loose tube type fiber optic cable with excellent flexibility and impact resistanceLIM JEONG-EUN·Filed 2012·Granted Dec 9, 2014·3 cites·1 claims
- 4669US8108819B2Object placement in integrated circuit designALPERT CHARLES JAY·Filed 2009·Granted Jan 31, 2012·6 cites·20 claims
- 4767US10102061B2Error checking and correction for NAND flash devicesIBM·Filed 2016·Granted Oct 16, 2018·2 cites·18 claims
- 4866US10977419B2Time-driven placement and/or cloning of components for an integrated circuitIBM·Filed 2019·Granted Apr 13, 2021·0 cites·20 claims
- 4966US10503841B2Integrated circuit buffering solutions considering sink delaysIBM·Filed 2019·Granted Dec 10, 2019·0 cites·20 claims
- 5066US10496764B2Integrated circuit buffering solutions considering sink delaysIBM·Filed 2019·Granted Dec 3, 2019·0 cites·20 claims
Showing the top 50 of 100 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →