Inventor · disambiguated record
Girish Venkitachalam
Also filed as: VENKITACHALAM GIRISH
8 granted patents·69 citations·filing 2004–2014
85Inventor score
Top patents by PatentIndex Score
8 records- 0194US7741716B1Integrated circuit bond pad structuresALTERA CORP·Filed 2005·Granted Jun 22, 2010·36 cites·20 claims
- 0288US8664725B1Strain enhanced transistors with adjustable layoutsVENKITACHALAM GIRISH·Filed 2011·Granted Mar 4, 2014·12 cites·18 claims
- 0384US9331137B1Metal-insulator-metal capacitors between metal interconnect layersRATAKONDA DEEPA·Filed 2012·Granted May 3, 2016·10 cites·18 claims
- 0474US9634094B1Strain-enhanced transistors with adjustable layoutsALTERA CORP·Filed 2014·Granted Apr 25, 2017·2 cites·7 claims
- 0572US8627264B1Automated verification of transformational operations on a photomask representationVENKITACHALAM GIRISH·Filed 2009·Granted Jan 7, 2014·5 cites·18 claims
- 0662US9484411B1Integrated circuit and a method to optimize strain inducing compositesALTERA CORP·Filed 2014·Granted Nov 1, 2016·1 cites·11 claims
- 0746US8765541B1Integrated circuit and a method to optimize strain inducing compositesVENKITACHALAM GIRISH·Filed 2011·Granted Jul 1, 2014·0 cites·17 claims
- 0846US7139997B1Method and system for checking operation of a mask generation algorithmALTERA CORP·Filed 2004·Granted Nov 21, 2006·3 cites·17 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →