Inventor · disambiguated record
Gordon C. Godejahn, Jr.
Also filed as: GODEJAHN GORDON C JR · GODEJAHN JR GORDON C
8 granted patents·261 citations·filing 1978–1984
89Inventor score
Files withROCKWELL INTERNATIONAL CORP8
Top patents by PatentIndex Score
8 records- 0192US4192059AProcess for and structure of high density VLSI circuits, having inherently self-aligned gates and contacts for FET devices and conducting linesROCKWELL INTERNATIONAL CORP·Filed 1978·Granted Mar 11, 1980·97 cites·22 claims
- 0282US4455737AProcess for and structure of high density VLSI circuits, having self-aligned gates and contacts for FET devices and conducting linesROCKWELL INTERNATIONAL CORP·Filed 1981·Granted Jun 26, 1984·38 cites·12 claims
- 0374US4506437AProcess for and structure of high density VLSI circuits, having self-aligned gates and contacts for FET devices and conducting linesROCKWELL INTERNATIONAL CORP·Filed 1982·Granted Mar 26, 1985·27 cites·10 claims
- 0467US4221045ASelf-aligned contacts in an ion implanted VLSI circuitROCKWELL INTERNATIONAL CORP·Filed 1978·Granted Sep 9, 1980·25 cites·20 claims
- 0565US4221044ASelf-alignment of gate contacts at local or remote sitesROCKWELL INTERNATIONAL CORP·Filed 1978·Granted Sep 9, 1980·22 cites·26 claims
- 0663US4477962AProcess for and structure of high density VLSI circuits, having self-aligned gates and contacts for FET devices and conducting linesROCKWELL INTERNATIONAL CORP·Filed 1982·Granted Oct 23, 1984·18 cites·6 claims
- 0759US4587711AProcess for high density VLSI circuits, having self-aligned gates and contacts for FET devices and conducting linesROCKWELL INTERNATIONAL CORP·Filed 1984·Granted May 13, 1986·16 cites·8 claims
- 0859US4277881AProcess for fabrication of high density VLSI circuits, having self-aligned gates and contacts for FET devices and conducting linesROCKWELL INTERNATIONAL CORP·Filed 1978·Granted Jul 14, 1981·18 cites·10 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →