Inventor · disambiguated record
Gregg B. Lesartre
Also filed as: LESARTRE GREGG · LESARTRE GREGG B · LESARTRE GREGG BERNARD
102 granted patents·25 pending applications·1,021 citations·filing 1996–2024
99Inventor score
Files withHEWLETT PACKARD ENTPR DEV LP62HEWLETT PACKARD DEVELOPMENT CO30HEWLETT PACKARD CO22LESARTRE GREGG B9HEWLETT PACKARD DEVELOPMENT CO LP2
Top patents by PatentIndex Score
127 records- 0184US5867644ASystem and method for on-chip debug support and performance monitoring in a microprocessorHEWLETT PACKARD CO·Filed 1996·Granted Feb 2, 1999·124 cites·30 claims
- 0281US10417091B2Memory device having error correction logicHEWLETT PACKARD DEVELOPMENT CO·Filed 2013·Granted Sep 17, 2019·7 cites·14 claims
- 0381US6003107ACircuitry for providing external access to signals that are internal to an integrated circuit chip packageHEWLETT PACKARD CO·Filed 1996·Granted Dec 14, 1999·98 cites·19 claims
- 0481US5956477AMethod for processing information in a microprocessor to facilitate debug and performance monitoringHEWLETT PACKARD CO·Filed 1996·Granted Sep 21, 1999·96 cites·31 claims
- 0580US10671291B2Iterative write sequence interruptHEWLETT PACKARD ENTPR DEV LP·Filed 2015·Granted Jun 2, 2020·3 cites·20 claims
- 0680US10402113B2Live migration of dataHEWLETT PACKARD ENTPR DEV LP·Filed 2014·Granted Sep 3, 2019·5 cites·13 claims
- 0780US10248571B2Saving position of a wear level rotationHEWLETT PACKARD ENTPR DEV LP·Filed 2016·Granted Apr 2, 2019·3 cites·17 claims
- 0880US7461321B2Error detectionHEWLETT PACKARD DEVELOPMENT CO·Filed 2005·Granted Dec 2, 2008·9 cites·22 claims
- 0979US6408363B1Speculative pre-flush of data in an out-of-order execution processor systemHEWLETT PACKARD CO·Filed 2000·Granted Jun 18, 2002·30 cites·18 claims
- 1077US5809275AStore-to-load hazard resolution system and method for a processor that executes instructions out of orderHEWLETT PACKARD CO·Filed 1996·Granted Sep 15, 1998·78 cites·27 claims
- 1175US12450069B2NIC line-rate hardware packet processingHEWLETT PACKARD ENTPR DEV LP·Filed 2024·Granted Oct 21, 2025·0 cites·20 claims
- 1275US11016683B2Serializing access to fault tolerant memoryHEWLETT PACKARD ENTPR DEV LP·Filed 2019·Granted May 25, 2021·1 cites·10 claims
- 1375US7178015B2Security measures in a partitionable computing systemHEWLETT PACKARD DEVELOPMENT CO·Filed 2004·Granted Feb 13, 2007·19 cites·42 claims
- 1475US6405287B1Cache line replacement using cache status to bias way selectionHEWLETT PACKARD CO·Filed 1999·Granted Jun 11, 2002·61 cites·6 claims
- 1574US10735030B2Re-encoding data associated with failed memory devicesHEWLETT PACKARD ENTPR DEV LP·Filed 2017·Granted Aug 4, 2020·3 cites·15 claims
- 1674US10474380B2External memory controllerHEWLETT PACKARD DEVELOPMENT CO·Filed 2013·Granted Nov 12, 2019·3 cites·14 claims
- 1774US6643766B1Speculative pre-fetching additional line on cache miss if no request pending in out-of-order processorHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Nov 4, 2003·21 cites·17 claims
- 1873US10491545B2Virtual channel routingHEWLETT PACKARD ENTPR DEV LP·Filed 2017·Granted Nov 26, 2019·2 cites·20 claims
- 1973US7992058B2Method and apparatus for loopback self testingHEWLETT PACKARD DEVELOPMENT CO·Filed 2008·Granted Aug 2, 2011·6 cites·18 claims
- 2073US6542965B2Cache line replacement using cable status to bias way selectionHEWLETT PACKARD CO·Filed 2002·Granted Apr 1, 2003·15 cites·14 claims
- 2171US10922178B2Masterless raid for byte-addressable non-volatile memoryHEWLETT PACKARD ENTPR DEV LP·Filed 2018·Granted Feb 16, 2021·1 cites·20 claims
- 2270US10824465B2Transaction request epochsHEWLETT PACKARD ENTPR DEV LP·Filed 2017·Granted Nov 3, 2020·1 cites·7 claims
- 2369US9146848B2Link training for a serdes linkHEWLETT PACKARD DEVELOPMENT CO·Filed 2013·Granted Sep 29, 2015·2 cites·14 claims
- 2469US5799167AInstruction nullification system and method for a processor that executes instructions out of orderHEWLETT PACKARD CO·Filed 1996·Granted Aug 25, 1998·56 cites·17 claims
- 2568US5880671AFlexible circuitry and method for detecting signal patterns on a busHEWLETT PACKARD CO·Filed 1996·Granted Mar 9, 1999·55 cites·34 claims
- 2667US10789115B2Transmitter that does not resend a packet despite receipt of a message to resend the packetHEWLETT PACKARD ENTPR DEV LP·Filed 2014·Granted Sep 29, 2020·2 cites·10 claims
- 2767US5796997AFast nullify system and method for transforming a nullify function into a select functionHEWLETT PACKARD CO·Filed 1996·Granted Aug 18, 1998·53 cites·12 claims
- 2866US10664410B2Transmitting contents of an operation field to a media controllerHEWLETT PACKARD ENTPR DEV LP·Filed 2015·Granted May 26, 2020·1 cites·15 claims
- 2965US12067397B2NIC line-rate hardware packet processingHEWLETT PACKARD ENTPR DEV LP·Filed 2023·Granted Aug 20, 2024·0 cites·20 claims
- 3065US10802936B2Memory location remapping and wear-levellingHEWLETT PACKARD ENTPR DEV LP·Filed 2015·Granted Oct 13, 2020·1 cites·13 claims
- 3165US10693811B2Age class based arbitrationHEWLETT PACKARD ENTPR DEV LP·Filed 2018·Granted Jun 23, 2020·1 cites·16 claims
- 3265US10620861B2Retrieve data block from determined devicesHEWLETT PACKARD ENTPR DEV LP·Filed 2015·Granted Apr 14, 2020·1 cites·10 claims
- 3365US10540109B2Serializing access to fault tolerant memoryHEWLETT PACKARD ENTPR DEV LP·Filed 2014·Granted Jan 21, 2020·1 cites·14 claims
- 3465US10303622B2Data write to subset of memory devicesHEWLETT PACKARD ENTPR DEV LP·Filed 2015·Granted May 28, 2019·1 cites·14 claims
- 3564US10474389B2Write tracking for memoriesHEWLETT PACKARD ENTPR DEV LP·Filed 2016·Granted Nov 12, 2019·1 cites·11 claims
- 3664US10318767B2Multi-tier security frameworkHEWLETT PACKARD ENTPR DEV LP·Filed 2014·Granted Jun 11, 2019·1 cites·15 claims
- 3764US10241715B2Rendering data invalid in a memory arrayHEWLETT PACKARD ENTPR DEV LP·Filed 2014·Granted Mar 26, 2019·1 cites·20 claims
- 3864US8732331B2Managing latencies in a multiprocessor interconnectLESARTRE GREGG B·Filed 2008·Granted May 20, 2014·3 cites·13 claims
- 3963US7903556B2Method of controlling data transfers between nodes in a computer systemHEWLETT PACKARD DEVELOPMENT CO·Filed 2005·Granted Mar 8, 2011·3 cites·32 claims
- 4063US7613958B2Error detection in a system having coupled channelsHEWLETT PACKARD DEVELOPMENT CO·Filed 2004·Granted Nov 3, 2009·8 cites·14 claims
- 4162US7721159B2Passing debug informationHEWLETT PACKARD DEVELOPMENT CO·Filed 2005·Granted May 18, 2010·2 cites·30 claims
- 4262US7624213B2Passing identification informationHEWLETT PACKARD DEVELOPMENT CO·Filed 2005·Granted Nov 24, 2009·2 cites·30 claims
- 4362US7363402B2Data communications architecture employing parallel SERDES channelsHEWLETT PACKARD DEVELOPMENT CO·Filed 2004·Granted Apr 22, 2008·7 cites·29 claims
- 4461US10657016B2Recovering stranded dataHEWLETT PACKARD ENTPR DEV LP·Filed 2018·Granted May 19, 2020·0 cites·20 claims
- 4561US8225048B2Systems and methods for resource accessLESARTRE GREGG B·Filed 2009·Granted Jul 17, 2012·2 cites·20 claims
- 4660US10452567B2Non-volatile memory to store resettable dataHEWLETT PACKARD DEVELOPMENT CO·Filed 2013·Granted Oct 22, 2019·1 cites·14 claims
- 4760US2021167038A1Dual in-line memory moduleHEWLETT PACKARD ENTPR DEV LP·Filed 2021·Application pending·0 cites
- 4859US10275307B2Detection of error patterns in memory diesHEWLETT PACKARD ENTPR DEV LP·Filed 2017·Granted Apr 30, 2019·1 cites·20 claims
- 4959US5644609AApparatus and method for reading and writing remote registers on an integrated circuit chip using a minimum of interconnectsHEWLETT PACKARD CO·Filed 1996·Granted Jul 1, 1997·22 cites·4 claims
- 5058US11748281B2Remote memory access using memory address templatesHEWLETT PACKARD ENTPR DEV LP·Filed 2021·Granted Sep 5, 2023·0 cites·17 claims
Showing the top 50 of 127 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →