Inventor · disambiguated record
Guenter Gerwig
Also filed as: GERWIG GUENTER
15 granted patents·5 pending applications·117 citations·filing 1994–2014
91Inventor score
Top patents by PatentIndex Score
20 records- 0186US7373369B2Advanced execution of extended floating-point add operations in a narrow dataflowIBM·Filed 2004·Granted May 13, 2008·53 cites·14 claims
- 0284US7720900B2Fused multiply add split for multiple precision arithmeticIBM·Filed 2005·Granted May 18, 2010·14 cites·14 claims
- 0374US9207706B2Generating monotonically increasing TOD values in a multiprocessor systemIBM·Filed 2013·Granted Dec 8, 2015·3 cites·20 claims
- 0471US7840622B2Method and floating point unit to convert a hexadecimal floating point number to a binary floating point numberIBM·Filed 2006·Granted Nov 23, 2010·8 cites·2 claims
- 0568US8095821B2Debugging for multiple errors in a microprocessor environmentMAYER ULRICH·Filed 2009·Granted Jan 10, 2012·4 cites·20 claims
- 0668US7392273B2High-sticky calculation in pipelined fused multiply/add circuitryIBM·Filed 2003·Granted Jun 24, 2008·14 cites·3 claims
- 0760US8516336B2Latch arrangement for an electronic digital system, method, data processing program, and computer program product for implementing a latch arrangementCREMER MICHAEL·Filed 2011·Granted Aug 20, 2013·2 cites·15 claims
- 0860US7873687B2Method for calculating a result of a division with a floating point unit with fused multiply-addIBM·Filed 2006·Granted Jan 18, 2011·2 cites·5 claims
- 0956US9342395B2Error checking using serial collection of error dataIBM·Filed 2014·Granted May 17, 2016·0 cites·18 claims
- 1055US9348686B2Error checking using serial collection of error dataIBM·Filed 2014·Granted May 24, 2016·0 cites·7 claims
- 1145US9311137B2Delaying interrupts for a transactional-execution facilityIBM·Filed 2012·Granted Apr 12, 2016·0 cites·20 claims
- 1245US2014281375A1Run-time instrumentation handling in a superscalar processorIBM·Filed 2013·Application pending·0 cites
- 1344US2004249877A1Fast integer division with minimum number of iterations in substraction-based hardware divide processorIBM·Filed 2004·Application pending·0 cites
- 1443US2004143613A1Floating point bypass register to resolve data dependencies in pipelined instruction sequencesIBM·Filed 2004·Application pending·0 cites
- 1543US2009204793A1RAW Hazard Detection and Resolution for Implicitly Used RegistersIBM·Filed 2008·Application pending·0 cites
- 1642US6694344B1Examination of residues of data-conversionsIBM·Filed 1999·Granted Feb 17, 2004·9 cites·14 claims
- 1741US9104364B2Generation and distribution of steered time interval pulse to a plurality of hardware components of the computing systemIBM·Filed 2012·Granted Aug 11, 2015·0 cites·17 claims
- 1840US8683261B2Out of order millicode control operationCREMER MICHAEL·Filed 2011·Granted Mar 25, 2014·0 cites·20 claims
- 1939US2012246508A1Method and system for continuously providing a high precision system clockENGLER EBERHARD·Filed 2012·Application pending·0 cites
- 2035US5542033ACorrection and modification of microprocessor chip operationsIBM·Filed 1994·Granted Jul 30, 1996·8 cites·12 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →