Inventor · disambiguated record
Guillem Sole
Also filed as: SOLE GUILLEM
6 granted patents·11 pending applications·17 citations·filing 2014–2020
75Inventor score
Top patents by PatentIndex Score
17 records- 0188US9785433B2Three source operand floating-point addition instruction with operand negation bits and intermediate and final result roundingINTEL CORP·Filed 2015·Granted Oct 10, 2017·10 cites·19 claims
- 0272US10445092B2Method and apparatus for performing a vector permute with an index and an immediateINTEL CORP·Filed 2014·Granted Oct 15, 2019·3 cites·21 claims
- 0369US9654143B2Consecutive bit error detection and correctionINTEL CORP·Filed 2014·Granted May 16, 2017·4 cites·15 claims
- 0457US2020097290A1Method and apparatus for performing a vector permute with an index and an immediateINTEL CORP·Filed 2019·Application pending·0 cites
- 0554US2021132950A1Bit shuffle processors, methods, systems, and instructionsINTEL CORP·Filed 2020·Application pending·0 cites
- 0651US2016283242A1Apparatus and method for vector horizontal logical instructionINTEL CORP·Filed 2014·Application pending·0 cites
- 0751US2019138303A1Apparatus and method for vector horizontal logical instructionINTEL CORP·Filed 2018·Application pending·0 cites
- 0850US10296489B2Method and apparatus for performing a vector bit shuffleINTEL CORP·Filed 2014·Granted May 21, 2019·0 cites·25 claims
- 0950US10296334B2Method and apparatus for performing a vector bit gatherINTEL CORP·Filed 2014·Granted May 21, 2019·0 cites·25 claims
- 1048US2018032332A1Three source operand floating-point addition instruction with operand negation bits and intermediate and final result roundingINTEL CORP·Filed 2017·Application pending·0 cites
- 1147US2016188341A1Apparatus and method for fused add-add instructionsOULD-AHMED-VALL ELMOUSTAPHA·Filed 2014·Application pending·0 cites
- 1247US2016188333A1Method and apparatus for compressing a mask valueINTEL CORP·Filed 2014·Application pending·0 cites
- 1347US2016188327A1Apparatus and method for fused multiply-multiply instructionsOULD-AHMED-VALL ELMOUSTAPHA·Filed 2014·Application pending·0 cites
- 1446US10713044B2Bit shuffle processors, methods, systems, and instructionsINTEL CORP·Filed 2015·Granted Jul 14, 2020·0 cites·23 claims
- 1544US2016179523A1Apparatus and method for vector broadcast and xorand logical instructionINTEL CORP·Filed 2014·Application pending·0 cites
- 1641US2015277904A1Method and apparatus for performing a plurality of multiplication operationsESPASA ROGER·Filed 2014·Application pending·0 cites
- 1732US2017308383A1Bit group interleave processors, methods, systems, and instructionsINTEL CORP·Filed 2015·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →