Inventor · disambiguated record
Gweltaz Gaudin
Also filed as: GAUDIN GWELTAZ
19 granted patents·17 pending applications·111 citations·filing 2008–2023
93Inventor score
Files withSOITEC SILICON ON INSULATOR23GAUDIN GWELTAZ5COMMISSARIAT ENERGIE ATOMIQUE4BROEKAART MARCEL1CASTEX ARNAUD1
Top patents by PatentIndex Score
36 records- 0193US9818614B2Apparatus for molecular adhesion bonding with compensation for radial misalignmentSONY SEMICONDUCTOR SOLUTIONS CORP·Filed 2015·Granted Nov 14, 2017·10 cites·20 claims
- 0293US8575002B2Direct bonding method with reduction in overlay misalignmentBROEKAART MARCEL·Filed 2011·Granted Nov 5, 2013·26 cites·18 claims
- 0393US8475612B2Method for molecular adhesion bonding with compensation for radial misalignmentGAUDIN GWELTAZ·Filed 2010·Granted Jul 2, 2013·23 cites·15 claims
- 0488US8202785B2Surface treatment for molecular bondingCASTEX ARNAUD·Filed 2009·Granted Jun 19, 2012·19 cites·15 claims
- 0583US8999090B2Process for bonding two substratesSOITEC SILICON ON INSULATOR·Filed 2013·Granted Apr 7, 2015·10 cites·16 claims
- 0681US8735946B2Substrate having a charged zone in an insulating buried layerSOITEC SILICON ON INSULATOR·Filed 2013·Granted May 27, 2014·4 cites·16 claims
- 0779US9123631B2Method for molecular adhesion bonding with compensation for radial misalignmentSOITEC SILICON ON INSULATOR·Filed 2013·Granted Sep 1, 2015·4 cites·18 claims
- 0876US8535996B2Substrate having a charged zone in an insulating buried layerSHAHEEN MOHAMAD·Filed 2008·Granted Sep 17, 2013·6 cites·11 claims
- 0975US11159140B2Hybrid structure for a surface acoustic wave deviceSOITEC SILICON ON INSULATOR·Filed 2017·Granted Oct 26, 2021·2 cites·10 claims
- 1069US9330958B2Process for fabricating a heterostructure limiting the formation of defectsSOITEC SILICON ON INSULATOR·Filed 2012·Granted May 3, 2016·2 cites·15 claims
- 1165US8790992B2Low-temperature bonding processGAUDIN GWELTAZ·Filed 2010·Granted Jul 29, 2014·2 cites·20 claims
- 1265US8603896B2Method for transferring a monocrystalline semiconductor layer onto a support substrateGAUDIN GWELTAZ·Filed 2012·Granted Dec 10, 2013·2 cites·17 claims
- 1357US9905531B2Method for producing composite structure with metal/metal bondingSOITEC SILICON ON INSULATOR·Filed 2013·Granted Feb 27, 2018·1 cites·9 claims
- 1456US2020336127A1Hybrid structure for a surface acoustic wave deviceSOITEC SILICON ON INSULATOR·Filed 2020·Application pending·0 cites
- 1553US2014225182A1Substrate having a charged zone in an insulating buried layerSOITEC SILICON ON INSULATOR·Filed 2014·Application pending·0 cites
- 1653US2025234574A1Method for manufacturing a 3d circuit with shared recrystallisation and dopant activation stepsCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2022·Application pending·0 cites
- 1752US9117686B23D integrated heterostructures having low-temperature bonded interfaces with high bonding energySOITEC SILICON ON INSULATOR·Filed 2014·Granted Aug 25, 2015·0 cites·17 claims
- 1852US2024395603A1Composite structure comprising a useful monocrystalline sic layer on a polycrystalline sic carrier substrate and method for manufacturing said structureSOITEC SILICON ON INSULATOR·Filed 2022·Application pending·0 cites
- 1951US12087631B2Method for producing a composite structure comprising a thin monocristalline layer on a carrier substrateSOITEC SILICON ON INSULATOR·Filed 2020·Granted Sep 10, 2024·0 cites·15 claims
- 2051US2025140602A1Composite structure and manufacturing method thereofSOITEC SILICON ON INSULATOR·Filed 2023·Application pending·0 cites
- 2151US2024392476A1Method for transferring a monocrystalline sic layer onto a polycrystalline sic carrier using a poly crystalline sic intermediate layerSOITEC SILICON ON INSULATOR·Filed 2022·Application pending·0 cites
- 2251US2023129131A1Method for manufacturing a semiconductor structureSOITEC SILICON ON INSULATOR·Filed 2021·Application pending·0 cites
- 2350US12234144B2Method for sealing cavities using membranesCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2020·Granted Feb 25, 2025·0 cites·18 claims
- 2449US11239108B2Method for producing a donor substrate for creating a three-dimensional integrated structure, and method for producing such an integrated structureSOITEC SILICON ON INSULATOR·Filed 2019·Granted Feb 1, 2022·0 cites·20 claims
- 2549US2024030061A1Donor substrate for the transfer of a thin layer and associated transfer methodCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2021·Application pending·0 cites
- 2648US2024170284A1Method for producing a silicon carbide-based semiconductor structure and intermediate composite structureSOITEC SILICON ON INSULATOR·Filed 2022·Application pending·0 cites
- 2748US2024266172A1Semiconductor structure comprising an electrically conductive bonding interface, and associated manufacturing methodCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2021·Application pending·0 cites
- 2847US2024145294A1Method for manufacturing a silicon-carbide-based semiconductor structure and intermediate composite structureSOITEC SILICON ON INSULATOR·Filed 2022·Application pending·0 cites
- 2947US2023040826A1Method of joining two semi-conductor substratesSOITEC SILICON ON INSULATOR·Filed 2020·Application pending·0 cites
- 3046US2012015497A1Preparing a Surface of a Sapphire Substrate for Fabricating HeterostructuresGAUDIN GWELTAZ·Filed 2009·Application pending·0 cites
- 3146US2024312831A1Method for producing a semiconductor structure comprising a useful layer made of silicon carbide, with improved electrical propertiesSOITEC SILICON ON INSULATOR·Filed 2022·Application pending·0 cites
- 3244US9548237B2Method for transferring a layer comprising a compressive stress layer and related structuresSOITEC SILICON ON INSULATOR·Filed 2013·Granted Jan 17, 2017·0 cites·17 claims
- 3344US2011000612A1Processing for bonding two substratesGAUDIN GWELTAZ·Filed 2009·Application pending·0 cites
- 3442US2011195560A1Method of producing a silicon-on-sapphire type heterostructureSOITEC SILICON ON INSULATOR·Filed 2009·Application pending·0 cites
- 3542US2023230868A1Detachable temporary substrate compatible with very high temperatures and process for transferring a working layer from said substrateSOITEC SILICON ON INSULATOR·Filed 2021·Application pending·0 cites
- 3640US11156778B2Method for manufacturing a semiconductor structureSOITEC SILICON ON INSULATOR·Filed 2017·Granted Oct 26, 2021·0 cites·19 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →