Inventor · disambiguated record
Harry Scrivener, Iii
Also filed as: SCRIVENER HARRY W · SCRIVENER III HARRY · SCRIVENER III HARRY W
7 granted patents·147 citations·filing 1997–2018
84Inventor score
Top patents by PatentIndex Score
7 records- 0178US6292860B1Method for preventing deadlock by suspending operation of processors, bridges, and devicesNCR CORP·Filed 1997·Granted Sep 18, 2001·89 cites·13 claims
- 0274US10812079B2Integrated circuit layout wiring for multi-core chipsST MICROELECTRONICS INC·Filed 2018·Granted Oct 20, 2020·2 cites·16 claims
- 0370US10097182B2Integrated circuit layout wiring for multi-core chipsST MICROELECTRONICS INC·Filed 2015·Granted Oct 9, 2018·2 cites·16 claims
- 0468US10747933B2Channel-less integrated circuit layout wiring for chips including a plurality of partitionsST MICROELECTRONICS INC·Filed 2018·Granted Aug 18, 2020·1 cites·19 claims
- 0557US6012127AMultiprocessor computing apparatus with optional coherency directoryINTEL CORP·Filed 1997·Granted Jan 4, 2000·33 cites·16 claims
- 0647US6073216ASystem and method for reliable system shutdown after coherency corruptionINTEL CORP·Filed 1997·Granted Jun 6, 2000·20 cites·20 claims
- 0744US10102327B2Integrated circuit layout wiring for multi-core chipsST MICROELECTRONICS INC·Filed 2015·Granted Oct 16, 2018·0 cites·18 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →