Inventor · disambiguated record
Harlan Lee Sur, Jr.
Also filed as: SUR HARLAN · SUR HARLAN LEE · SUR JR HARLAN · SUR JR HARLAN L
19 granted patents·1 pending application·774 citations·filing 1996–2001
96Inventor score
Files withVLSI TECHNOLOGY INC11PHILIPS ELECTRONICS NA5KONINKL PHILIPS ELECTRONICS NV1PHILIPS SEMICONDUCTORS INC1
Top patents by PatentIndex Score
20 records- 0193US6236222B1Method and apparatus for detecting misalignments in interconnect structuresPHILIPS ELECTRONICS NA·Filed 1997·Granted May 22, 2001·111 cites·21 claims
- 0292US5854510ALow power programmable fuse structuresVLSI TECHNOLOGY INC·Filed 1997·Granted Dec 29, 1998·114 cites·24 claims
- 0391US5882998ALow power programmable fuse structures and methods for making the sameVLSI TECHNOLOGY INC·Filed 1998·Granted Mar 16, 1999·99 cites·14 claims
- 0489US6323113B1Intelligent gate-level fill methods for reducing global pattern density effectsPHILIPS ELECTRONICS NA·Filed 1999·Granted Nov 27, 2001·106 cites·34 claims
- 0586US6143642AProgrammable semiconductor structures and methods for making the sameVLSI TECHNOLOGY INC·Filed 1997·Granted Nov 7, 2000·85 cites·21 claims
- 0684US5923947AMethod for achieving low capacitance diffusion pattern fillingVLSI TECHNOLOGY INC·Filed 1997·Granted Jul 13, 1999·59 cites·8 claims
- 0771US6277708B1Semiconductor structures for suppressing gate oxide plasma charging damage and methods for making the samePHILIPS ELECTRONICS NA·Filed 1999·Granted Aug 21, 2001·33 cites·7 claims
- 0870US6133111AMethod of making photo alignment structurePHILIPS ELECTRONICS NA·Filed 1998·Granted Oct 17, 2000·33 cites·18 claims
- 0969US6013927ASemiconductor structures for suppressing gate oxide plasma charging damage and methods for making the sameVLSI TECHNOLOGY INC·Filed 1998·Granted Jan 11, 2000·30 cites·17 claims
- 1063US5928968ASemiconductor pressure transducer structures and methods for making the sameVLSI TECHNOLOGY INC·Filed 1997·Granted Jul 27, 1999·20 cites·9 claims
- 1162US5882997AMethod for making devices having thin load structuresVLSI TECHNOLOGY INC·Filed 1997·Granted Mar 16, 1999·18 cites·22 claims
- 1254US5811346ASilicon corner rounding in shallow trench isolation processVLSI TECHNOLOGY INC·Filed 1997·Granted Sep 22, 1998·20 cites·18 claims
- 1352US5877562APhoto alignment structureFiled 1997·Granted Mar 2, 1999·15 cites·4 claims
- 1445US6077762AMethod and apparatus for rapidly discharging plasma etched interconnect structuresVLSI TECHNOLOGY INC·Filed 1997·Granted Jun 20, 2000·11 cites·15 claims
- 1544US5764563AThin film load structureVLSI TECHNOLOGY INC·Filed 1996·Granted Jun 9, 1998·7 cites·25 claims
- 1642US6756316B1Semiconductor pressure transducer structures and methods for making the sameKONINKL PHILIPS ELECTRONICS NV·Filed 1999·Granted Jun 29, 2004·7 cites·15 claims
- 1734US6093658AMethod for making reliable interconnect structuresPHILIPS ELECTRONICS NA·Filed 1997·Granted Jul 25, 2000·4 cites·12 claims
- 1833US2001009792A1Reduced gate length transistor structures and methods for fabricating the sameFiled 2001·Application pending·0 cites
- 1932US6140188ASemiconductor device having load device with trench isolation region and fabrication thereofPHILIPS SEMICONDUCTORS INC·Filed 1998·Granted Oct 31, 2000·1 cites·7 claims
- 2031US5993040AWell-based method for achieving low capacitance diffusion pattern fillingVLSI TECHNOLOGY INC·Filed 1997·Granted Nov 30, 1999·1 cites·11 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →