Inventor · disambiguated record
Han Tran
Also filed as: TRAN HAN · TRAN HAN N
13 granted patents·2 pending applications·78 citations·filing 1999–2025
88Inventor score
Top patents by PatentIndex Score
15 records- 0191US11087207B2Decoders for analog neural memory in deep learning artificial neural networkSILICON STORAGE TECH INC·Filed 2018·Granted Aug 10, 2021·9 cites·36 claims
- 0286US11423979B2Decoding system and physical layout for analog neural memory in deep learning artificial neural networkSILICON STORAGE TECH INC·Filed 2019·Granted Aug 23, 2022·5 cites·6 claims
- 0378US12248870B2Neural network deviceSILICON STORAGE TECH INC·Filed 2023·Granted Mar 11, 2025·0 cites·8 claims
- 0474US12237011B2Read and programming decoding system for analog neural memorySILICON STORAGE TECH INC·Filed 2022·Granted Feb 25, 2025·0 cites·6 claims
- 0574US9799069B2Graphical dining interfaceSTACKED RESTAURANTS LLC·Filed 2013·Granted Oct 24, 2017·4 cites·15 claims
- 0674US2025174271A1Vector-by-matrix mutiplication array comprising control gate lines perpendicular to word linesSILICON STORAGE TECH INC·Filed 2025·Application pending·0 cites
- 0773US11354562B2Programmable neuron for analog non-volatile memory in deep learning artificial neural networkSILICON STORAGE TECH INC·Filed 2018·Granted Jun 7, 2022·2 cites·39 claims
- 0872US11089085B2Passing of data via deep links for application componentsGOOGLE LLC·Filed 2020·Granted Aug 10, 2021·1 cites·20 claims
- 0971US12099921B2Decoders for analog neural memory in deep learning artificial neural networkSILICON STORAGE TECH INC·Filed 2021·Granted Sep 24, 2024·0 cites·17 claims
- 1064US6658018B1Method and system of providing advanced teaming functionality capable of utilizing heterogeneous adapters to improve utility and performanceINTEL CORP·Filed 1999·Granted Dec 2, 2003·57 cites·30 claims
- 1158US12299562B2Analog neural memory array in artificial neural network with source line pulldown mechanismSILICON STORAGE TECH INC·Filed 2020·Granted May 13, 2025·0 cites·19 claims
- 1254US2025208774A1Programmable logic block comprising flash memory array to store configuration data for programmable logicSILICON STORAGE TECH INC·Filed 2024·Application pending·0 cites
- 1353US10726475B2Graphical dining interfaceSTACKED RESTAURANTS LLC·Filed 2017·Granted Jul 28, 2020·0 cites·20 claims
- 1452US11568229B2Redundant memory access for rows or columns containing faulty memory cells in analog neural memory in deep learning artificial neural networkSILICON STORAGE TECH INC·Filed 2018·Granted Jan 31, 2023·0 cites·31 claims
- 1548US10826967B1Passing of data via deep links for application componentsGOOGLE LLC·Filed 2019·Granted Nov 3, 2020·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →