Inventor · disambiguated record
Henry A. Bonges, Iii
Also filed as: BONGES HENRY A · BONGES III HENRY A
11 granted patents·4 pending applications·293 citations·filing 1991–2023
90Inventor score
Top patents by PatentIndex Score
15 records- 0195US5313424AModule level electronic redundancyIBM·Filed 1992·Granted May 17, 1994·157 cites·10 claims
- 0294US7067886B2Method of assessing potential for charging damage in SOI designs and structures for eliminating potential for damageIBM·Filed 2003·Granted Jun 27, 2006·95 cites·15 claims
- 0380US7712057B2Determining allowance antenna area as function of total gate insulator area for SOI technologyIBM·Filed 2007·Granted May 4, 2010·11 cites·5 claims
- 0475US7299426B2System and method to improve chip yield, reliability and performanceIBM·Filed 2005·Granted Nov 20, 2007·6 cites·4 claims
- 0565US7941780B2Intersect area based ground rule for semiconductor designIBM·Filed 2008·Granted May 10, 2011·2 cites·25 claims
- 0663US7132318B2Method of assessing potential for charging damage in SOI designs and structures for eliminating potential for damageIBM·Filed 2004·Granted Nov 7, 2006·9 cites·12 claims
- 0760US8185859B2System and method to improve chip yield, reliability and performanceBONGES III HENRY A·Filed 2007·Granted May 22, 2012·2 cites·14 claims
- 0857US7120887B2Cloned and original circuit shape mergingIBM·Filed 2004·Granted Oct 10, 2006·5 cites·20 claims
- 0951US2025021734A1Defined circuit structure pattern identification and placement avoidanceIBM·Filed 2023·Application pending·0 cites
- 1051US2024411975A1Density-aware fill with boundary compensationIBM·Filed 2023·Application pending·0 cites
- 1149US8635575B2System and method to improve chip yield, reliability and performanceBONGES III HENRY A·Filed 2012·Granted Jan 21, 2014·0 cites·19 claims
- 1249US2025005252A1Yielding and routable circuit co-design using viabarsIBM·Filed 2023·Application pending·0 cites
- 1343US2007271540A1Structure and method for reducing susceptibility to charging damage in soi designsIBM·Filed 2006·Application pending·0 cites
- 1442US7275226B2Method of performing latch up check on an integrated circuit designIBM·Filed 2004·Granted Sep 25, 2007·0 cites·19 claims
- 1541US5101120ABiCMOS output driverIBM·Filed 1991·Granted Mar 31, 1992·6 cites·18 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →