Inventor · disambiguated record
Herman M. Chang
Also filed as: CHANG HERMAN · CHANG HERMAN M
25 granted patents·1,443 citations·filing 1992–2003
97Inventor score
Files withVANTIS CORP16LATTICE SEMICONDUCTOR CORP7ADVANCED MICRO DEVICES INC1HOLTEK MICROELECTRONICS INC1
Top patents by PatentIndex Score
25 records- 0198US6275064B1Symmetrical, extended and fast direct connections between variable grain blocks in FPGA integrated circuitsVANTIS CORP·Filed 1997·Granted Aug 14, 2001·218 cites·28 claims
- 0297US6249144B1Methods for configuring FPGA's having variable grain components for providing time-shared access to interconnect resourcesVANTIS CORP·Filed 2000·Granted Jun 19, 2001·67 cites·2 claims
- 0397US6130551ASynthesis-friendly FPGA architecture with variable length and variable timing interconnectVANTIS CORP·Filed 1998·Granted Oct 10, 2000·138 cites·26 claims
- 0496US6380759B1Variable grain architecture for FPGA integrated circuitsVANTIS CORP·Filed 2000·Granted Apr 30, 2002·64 cites·38 claims
- 0596US6163168AEfficient interconnect network for use in FPGA device having variable grain architectureVANTIS CORP·Filed 1998·Granted Dec 19, 2000·154 cites·31 claims
- 0696US6097212AVariable grain architecture for FPGA integrated circuitsLATTICE SEMICONDUCTOR CORP·Filed 1997·Granted Aug 1, 2000·105 cites·112 claims
- 0795US6181163B1FPGA integrated circuit having embedded SRAM memory blocks and interconnect channel for broadcasting address and control signalsVANTIS CORP·Filed 1999·Granted Jan 30, 2001·142 cites·17 claims
- 0894US6590415B2Methods for configuring FPGA's having variable grain components for providing time-shared access to interconnect resourcesLATTICE SEMICONDUCTOR CORP·Filed 2001·Granted Jul 8, 2003·62 cites·13 claims
- 0993US6216257B1FPGA device and method that includes a variable grain function architecture for implementing configuration logic blocks and a complimentary variable length interconnect architecture for providing configurable routing between configuration logic blocksVANTIS CORP·Filed 2000·Granted Apr 10, 2001·82 cites·10 claims
- 1088US6621298B2Variable grain architecture for FPGA integrated circuitsLATTICE SEMICONDUCTOR CORP·Filed 2002·Granted Sep 16, 2003·25 cites·20 claims
- 1188US6154051ATileable and compact layout for super variable grain blocks within FPGA deviceVANTIS CORP·Filed 1998·Granted Nov 28, 2000·75 cites·22 claims
- 1287US6127843ADual port SRAM memory for run time use in FPGA integrated circuitsVANTIS CORP·Filed 1997·Granted Oct 3, 2000·58 cites·44 claims
- 1384US6211695B1FPGA integrated circuit having embedded SRAM memory blocks with registered address and data input sectionsVANTIS CORP·Filed 1999·Granted Apr 3, 2001·41 cites·66 claims
- 1484US6100715AMethods for configuring FPGA's having variable grain blocks and logic for providing time-shared access to interconnect resourcesVANTIS CORP·Filed 1998·Granted Aug 8, 2000·46 cites·8 claims
- 1581US6081473AFPGA integrated circuit having embedded sram memory blocks each with statically and dynamically controllable read modeLATTICE SEMICONDUCTOR CORP·Filed 1998·Granted Jun 27, 2000·41 cites·17 claims
- 1680US6034544AProgrammable input/output block (IOB) in FPGA integrated circuitsLATTICE SEMICONDUCTOR CORP·Filed 1997·Granted Mar 7, 2000·37 cites·5 claims
- 1773US6526558B2Methods for configuring FPGA's having variable grain blocks and shared logic for providing symmetric routing of result output to differently-directed and tristateable interconnect resourcesLATTICE SEMICONDUCTOR CORP·Filed 2000·Granted Feb 25, 2003·14 cites·15 claims
- 1866US5315174AProgrammable output slew rate controlADVANCED MICRO DEVICES INC·Filed 1992·Granted May 24, 1994·20 cites·11 claims
- 1959US6097664AMulti-port SRAM cell array having plural write paths including for writing through addressable port and through serial boundary scanVANTIS CORP·Filed 1999·Granted Aug 1, 2000·18 cites·32 claims
- 2056USRE39510EFPGA integrated circuit having embedded sram memory blocks with registered address and data input sectionsLATTICE SEMICONDUCTOR CORP·Filed 2003·Granted Mar 13, 2007·6 cites·71 claims
- 2155US6292930B1Methods for configuring FPGA's having variable grain blocks and shared logic for providing time-shared access to interconnect resourcesVANTIS CORP·Filed 2000·Granted Sep 18, 2001·7 cites·32 claims
- 2252US6204686B1Methods for configuring FPGA's having variable grain blocks and shared logic for providing symmetric routing of result output to differently-directed and tristateable interconnect resourcesVANTIS CORP·Filed 1998·Granted Mar 20, 2001·10 cites·33 claims
- 2348US6150842AVariable grain architecture for FPGA integrated circuitsVANTIS CORP·Filed 1999·Granted Nov 21, 2000·6 cites·13 claims
- 2437US6124730AMethods for configuring FPGA's having variable grain components for providing time-shared access to interconnect resourcesVANTIS CORP·Filed 1998·Granted Sep 26, 2000·4 cites·10 claims
- 2524US5424740ADigital-to-analog converter with a Johnson code generatorHOLTEK MICROELECTRONICS INC·Filed 1993·Granted Jun 13, 1995·3 cites·12 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →