Inventor · disambiguated record
Hemang M. Parekh
Also filed as: PAREKH HEMANG · PAREKH HEMANG M · PAREKH HEMANG MAHESHKUMAR
18 granted patents·1 pending application·95 citations·filing 2006–2024
92Inventor score
Top patents by PatentIndex Score
19 records- 0195US9866269B1Method of and circuit for predistortion for a power amplifierXILINX INC·Filed 2016·Granted Jan 9, 2018·23 cites·20 claims
- 0294US11356066B1Digital communications circuits and systemsXILINX INC·Filed 2020·Granted Jun 7, 2022·4 cites·18 claims
- 0393US9455760B1Waveform adaptable digital predistortionXILINX INC·Filed 2015·Granted Sep 27, 2016·17 cites·20 claims
- 0491US10715702B1Method of and circuit for predistortion for a cable TV amplifierXILINX INC·Filed 2019·Granted Jul 14, 2020·9 cites·20 claims
- 0591US10411656B1Method of and circuit for crest factor reduction for a cable TV amplifierXILINX INC·Filed 2018·Granted Sep 10, 2019·9 cites·20 claims
- 0687US11251819B1Thermal effect mitigation for digital pre-distortionXILINX INC·Filed 2020·Granted Feb 15, 2022·2 cites·17 claims
- 0780US11563453B1Time constant tracking for digital pre-distortionXILINX INC·Filed 2021·Granted Jan 24, 2023·1 cites·20 claims
- 0877US10622951B1Digital communications circuits and systemsXILINX INC·Filed 2018·Granted Apr 14, 2020·3 cites·21 claims
- 0972US10944444B2Method of and circuit for predistortion for a cable TV amplifierXILINX INC·Filed 2018·Granted Mar 9, 2021·2 cites·20 claims
- 1070US7793200B1Method of and circuit for accessing a memory of a trellis decoderXILINX INC·Filed 2006·Granted Sep 7, 2010·8 cites·20 claims
- 1169US7610453B1Reordering each array in a sequence of arraysXILINX INC·Filed 2006·Granted Oct 27, 2009·6 cites·20 claims
- 1266US7669017B1Method of and circuit for buffering dataXILINX INC·Filed 2006·Granted Feb 23, 2010·4 cites·13 claims
- 1364US8572148B1Data reorganizer for fourier transformation of parallel data streamsSZEDO GABOR·Filed 2009·Granted Oct 29, 2013·3 cites·14 claims
- 1463US11942904B2Systems and methods for digital predistortion to mitigate power amplifier bias circuit effectsXILINX INC·Filed 2021·Granted Mar 26, 2024·0 cites·20 claims
- 1562US11984919B2PIM cancellation architectureXILINX INC·Filed 2022·Granted May 14, 2024·0 cites·20 claims
- 1661US8799750B1Convolutional interleaver for bursty memory accessPAREKH HEMANG M·Filed 2011·Granted Aug 5, 2014·4 cites·20 claims
- 1752US11483018B1Reconfigurable and scalable nonlinear filter for digital pre-distortersXILINX INC·Filed 2021·Granted Oct 25, 2022·0 cites·20 claims
- 1851US2025226849A1Pim cancellation adapt architectureXILINX INC·Filed 2024·Application pending·0 cites
- 1947US10951249B1System and method for time-interpolated power change in a digital pre-distortion circuitXILINX INC·Filed 2020·Granted Mar 16, 2021·0 cites·20 claims
Join the waitlist — get patent alerts
Get an alert when Hemang M. Parekh files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →