Inventor · disambiguated record
Hemant G. Rotithor
Also filed as: ROTITHOR HEMANT · ROTITHOR HEMANT G
11 granted patents·2 pending applications·144 citations·filing 2002–2018
90Inventor score
Top patents by PatentIndex Score
13 records- 0192US8443151B2Prefetch optimization in shared resource multi-core systemsTANG PUQI P·Filed 2009·Granted May 14, 2013·51 cites·38 claims
- 0284US8924651B2Prefetch optimization in shared resource multi-core systemsINTEL CORP·Filed 2013·Granted Dec 30, 2014·9 cites·20 claims
- 0379US7127574B2Method and apparatus for out of order memory schedulingINTEL CORPORATIOON·Filed 2003·Granted Oct 24, 2006·34 cites·42 claims
- 0476US8209493B2Systems and methods for scheduling memory requests during memory throttlingROTITHOR HEMANT G·Filed 2008·Granted Jun 26, 2012·11 cites·25 claims
- 0572US7350030B2High performance chipset prefetcher for interleaved channelsINTEL CORP·Filed 2005·Granted Mar 25, 2008·7 cites·10 claims
- 0670US6983356B2High performance memory device-state aware chipset prefetcherINTEL CORP·Filed 2002·Granted Jan 3, 2006·15 cites·66 claims
- 0762US8090967B2Power state transition initiation control of memory interconnect based on early warning signal, memory response time, and wakeup delayHALLNOR ERIK G·Filed 2008·Granted Jan 3, 2012·4 cites·19 claims
- 0855US7386658B2Memory post-write page closing apparatus and methodINTEL CORP·Filed 2004·Granted Jun 10, 2008·8 cites·5 claims
- 0953US7167947B2Memory post-write page closing apparatus and methodINTEL CORP·Filed 2004·Granted Jan 23, 2007·3 cites·16 claims
- 1051US10069711B2System and method for link based computing system having automatically adjustable bandwidth and corresponding power consumptionROTITHOR HEMANT·Filed 2006·Granted Sep 4, 2018·2 cites·2 claims
- 1150US10911345B2System and method for link based computing system having automatically adjustable bandwidth and corresponding power consumptionINTEL CORP·Filed 2018·Granted Feb 2, 2021·0 cites·26 claims
- 1242US2009006813A1Data forwarding from system memory-side prefetcherSINGHAL ABHISHEK·Filed 2007·Application pending·0 cites
- 1337US2005172091A1Method and an apparatus for interleaving read data return in a packetized interconnect to memoryFiled 2004·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →