Inventor · disambiguated record
Hemanshu T. Vernenker
Also filed as: VERNENKER HEMANSHU · VERNENKER HEMANSHU T
18 granted patents·184 citations·filing 2000–2007
94Inventor score
Top patents by PatentIndex Score
18 records- 0195US7173851B13.5 transistor non-volatile memory cell using gate breakdown phenomenaKILOPASS TECHNOLOGY INC·Filed 2005·Granted Feb 6, 2007·61 cites·7 claims
- 0283US7317343B1Pulse-generation circuit with multi-delay block and set-reset latchesLATTICE SEMICONDUCTOR CORP·Filed 2005·Granted Jan 8, 2008·13 cites·11 claims
- 0375US7221607B1Multi-port memory systems and methods for bit line couplingLATTICE SEMICONDUCTOR CORP·Filed 2005·Granted May 22, 2007·10 cites·20 claims
- 0472US7378879B1Decoding systems and methodsLATTICE SEMICONDUCTOR CORP·Filed 2005·Granted May 27, 2008·7 cites·3 claims
- 0571US7539076B1Variable data width memory systems and methodsLATTICE SEMICONDUCTOR CORP·Filed 2007·Granted May 26, 2009·7 cites·20 claims
- 0665US7414913B1Bitline twisting scheme for multiport memoryLATTICE SEMICONDUCTOR CORP·Filed 2005·Granted Aug 19, 2008·6 cites·23 claims
- 0765US7177207B1Sense amplifier timingLATTICE SEMICONDUCTOR CORP·Filed 2004·Granted Feb 13, 2007·14 cites·17 claims
- 0862US7307912B1Variable data width memory systems and methodsLATTICE SEMICONDUCTOR CORP·Filed 2004·Granted Dec 11, 2007·11 cites·19 claims
- 0960US6909663B1Multiport memory with twisted bitlinesLATTICE SEMICONDUCTOR CORP·Filed 2003·Granted Jun 21, 2005·13 cites·17 claims
- 1057US7376872B1Testing embedded memory in integrated circuits such as programmable logic devicesLATTICE SEMICONDUCTOR CORP·Filed 2004·Granted May 20, 2008·12 cites·4 claims
- 1154US7187203B1Cascadable memoryLATTICE SEMICONDUCTOR CORP·Filed 2004·Granted Mar 6, 2007·6 cites·22 claims
- 1251US7116585B2Memory systems and methodsLATTICE SEMICONDUCTOR CORP·Filed 2004·Granted Oct 3, 2006·8 cites·22 claims
- 1348US7177221B1Initializing memory blocksLATTICE SEMICONDUCTOR CORP·Filed 2004·Granted Feb 13, 2007·4 cites·20 claims
- 1447US6240024B1Method and apparatus for generating an echo clock in a memoryMOTOROLA INC·Filed 2000·Granted May 29, 2001·6 cites·20 claims
- 1544US7685483B1Design features for testing integrated circuitsLATTICE SEMICONDUCTOR CORP·Filed 2005·Granted Mar 23, 2010·1 cites·5 claims
- 1641US7215591B2Byte enable logic for memoryLATTICE SEMICONDUCTOR CORP·Filed 2004·Granted May 8, 2007·3 cites·18 claims
- 1738US7149129B2Memory output data systems and methods with feedbackLATTICE SEMICONDUCTOR CORP·Filed 2004·Granted Dec 12, 2006·2 cites·20 claims
- 1835US7342846B2Address decoding systems and methodsLATTICE SEMICONDUCTOR CORP·Filed 2005·Granted Mar 11, 2008·0 cites·18 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →