Inventor · disambiguated record
Hiroshi Arimoto
Also filed as: ARIMOTO HIROSHI
12 granted patents·379 citations·filing 1989–2011
93Inventor score
Files withFUJITSU LTD6ARIMOTO HIROSHI2FUJITSU SEMICONDUCTOR LTD2FUJITSU MICROELECTRONICS LTD1SUMITOMO ELECTRIC INDUSTRIES1
Top patents by PatentIndex Score
12 records- 0189US5846885APlasma treatment methodFUJITSU LTD·Filed 1996·Granted Dec 8, 1998·102 cites·24 claims
- 0284US5981049ACoated tool and method of manufacturing the sameSUMITOMO ELECTRIC INDUSTRIES·Filed 1997·Granted Nov 9, 1999·66 cites·29 claims
- 0383US8024674B2Semiconductor circuit design method and semiconductor circuit manufacturing methodFUJITSU SEMICONDUCTOR LTD·Filed 2009·Granted Sep 20, 2011·14 cites·16 claims
- 0480US7934178B2Layout method of semiconductor circuit, program and design support systemFUJITSU SEMICONDUCTOR LTD·Filed 2007·Granted Apr 26, 2011·11 cites·20 claims
- 0578US7601471B2Apparatus and method for correcting pattern dimension and photo mask and test photo maskFUJITSU MICROELECTRONICS LTD·Filed 2005·Granted Oct 13, 2009·5 cites·18 claims
- 0675US8484597B2Integrated circuit manufacturing method, design method and programARIMOTO HIROSHI·Filed 2011·Granted Jul 9, 2013·5 cites·10 claims
- 0773US6060329AMethod for plasma treatment and apparatus for plasma treatmentFUJITSU LTD·Filed 1998·Granted May 9, 2000·24 cites·17 claims
- 0871US5406094AQuantum interference effect semiconductor device and method of producing the sameFUJITSU LTD·Filed 1992·Granted Apr 11, 1995·37 cites·27 claims
- 0971US5313484AQuantum box or quantum wire semiconductor structure and methods of producing sameFUJITSU LTD·Filed 1992·Granted May 17, 1994·50 cites·24 claims
- 1070US6104486AFabrication process of a semiconductor device using ellipsometryFUJITSU LTD·Filed 1996·Granted Aug 15, 2000·37 cites·11 claims
- 1169US5130766AQuantum interference type semiconductor deviceFUJITSU LTD·Filed 1989·Granted Jul 14, 1992·25 cites·20 claims
- 1261US8935146B2Computer aided design apparatus, computer aided design program, computer aided design method for a semiconductor device and method of manufacturing a semiconductor circuit based on characteristic value and simulation parameterARIMOTO HIROSHI·Filed 2008·Granted Jan 13, 2015·3 cites·23 claims
Join the waitlist — get patent alerts
Get an alert when Hiroshi Arimoto files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →