Inventor · disambiguated record
Hiten Kothari
Also filed as: KOTHARI HITEN · KOTHARI HITEN M
11 granted patents·2 pending applications·45 citations·filing 2004–2024
86Inventor score
Top patents by PatentIndex Score
13 records- 0192US9142510B23D interconnect structure comprising through-silicon vias combined with fine pitch backside metal redistribution lines fabricated using a dual damascene type approachLEE KEVIN J·Filed 2011·Granted Sep 22, 2015·17 cites·19 claims
- 0291US9449913B23D interconnect structure comprising fine pitch single damascene backside metal redistribution lines combined with through-silicon viasLEE KEVIN J·Filed 2011·Granted Sep 20, 2016·18 cites·22 claims
- 0386US11393754B2Contact over active gate structures with etch stop layers for advanced integrated circuit structure fabricationINTEL CORP·Filed 2018·Granted Jul 19, 2022·3 cites·8 claims
- 0482US12261122B2Contact over active gate structures with etch stop layers for advanced integrated circuit structure fabricationINTEL CORP·Filed 2023·Granted Mar 25, 2025·0 cites·20 claims
- 0581US2024347465A1Contact over active gate structures with etch stop layers for advanced integrated circuit structure fabricationINTEL CORP·Filed 2024·Application pending·0 cites
- 0677US12406931B2Contact over active gate structures with etch stop layers for advanced integrated circuit structure fabricationINTEL CORP·Filed 2022·Granted Sep 2, 2025·0 cites·21 claims
- 0774US9721886B2Preservation of fine pitch redistribution linesINTEL CORP·Filed 2013·Granted Aug 1, 2017·5 cites·25 claims
- 0864US9818710B2Anchored interconnectINTEL CORP·Filed 2014·Granted Nov 14, 2017·2 cites·23 claims
- 0948US9530740B23D interconnect structure comprising through-silicon vias combined with fine pitch backside metal redistribution lines fabricated using a dual damascene type approachINTEL CORP·Filed 2015·Granted Dec 27, 2016·0 cites·20 claims
- 1047US7361261B2Method of preparing a chiral substrate surface by electrodepositionUNIV MISSOURI·Filed 2004·Granted Apr 22, 2008·0 cites·7 claims
- 1142US11430948B2Resistive random access memory device with switching multi-layer stack and methods of fabricationINTEL CORP·Filed 2017·Granted Aug 30, 2022·0 cites·20 claims
- 1235US11489112B2Resistive random access memory device and methods of fabricationINTEL CORP·Filed 2017·Granted Nov 1, 2022·0 cites·25 claims
- 1332US2019237391A1Chip assemblies employing solder bonds to back-side lands including an electrolytic nickel layerINTEL CORP·Filed 2016·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →