Inventor · disambiguated record
Homer Warner Miller
Also filed as: MILLER HOMER W · MILLER HOMER WARNER
10 granted patents·111 citations·filing 1975–1985
89Inventor score
Files withHONEYWELL INF SYSTEMS10
Top patents by PatentIndex Score
10 records- 0172US4649539AApparatus providing improved diagnosabilityHONEYWELL INF SYSTEMS·Filed 1985·Granted Mar 10, 1987·31 cites·6 claims
- 0255US4581738ATest and maintenance method and apparatus for a data processing systemHONEYWELL INF SYSTEMS·Filed 1983·Granted Apr 8, 1986·21 cites·11 claims
- 0351US4092522A5-Bit counter/shift register utilizing current mode logicHONEYWELL INF SYSTEMS·Filed 1977·Granted May 30, 1978·9 cites·8 claims
- 0451US3958112ACurrent mode binary/bcd arithmetic arrayHONEYWELL INF SYSTEMS·Filed 1975·Granted May 18, 1976·15 cites·5 claims
- 0541US4071904ACurrent mode multiple-generating registerHONEYWELL INF SYSTEMS·Filed 1977·Granted Jan 31, 1978·9 cites·6 claims
- 0641US3955177AMagnitude comparison circuitHONEYWELL INF SYSTEMS·Filed 1975·Granted May 4, 1976·9 cites·3 claims
- 0733US4081860ACurrent mode 4-bit arithmetic logic unit with parityHONEYWELL INF SYSTEMS·Filed 1977·Granted Mar 28, 1978·5 cites·2 claims
- 0833US4079457ACurrent mode binary/BCD arithmetic logic unit with parityHONEYWELL INF SYSTEMS·Filed 1977·Granted Mar 14, 1978·5 cites·2 claims
- 0932US4084252ACurrent mode 5-bit arithmetic logic unit with parityHONEYWELL INF SYSTEMS·Filed 1977·Granted Apr 11, 1978·4 cites·2 claims
- 1030US4084253ACurrent mode arithmetic logic circuit with parity prediction and checkingHONEYWELL INF SYSTEMS·Filed 1977·Granted Apr 11, 1978·3 cites·2 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →