Inventor · disambiguated record
Hsie-Chia Chang
Also filed as: CHANG HSIE-CHIA
30 granted patents·15 pending applications·174 citations·filing 1997–2021
96Inventor score
Files withUNIV NAT CHIAO TUNG11LITE ON IT CORP6UNIV NATIONAL CHIAO TUNG6MACRONIX INT CO LTD4LIN YI MIN2
Top patents by PatentIndex Score
45 records- 0194US9628114B2Length-compatible extended polar codesMACRONIX INT CO LTD·Filed 2015·Granted Apr 18, 2017·16 cites·13 claims
- 0292US9129698B2Solid state storage device and sensing voltage setting method thereofLITE ON IT CORP·Filed 2014·Granted Sep 8, 2015·19 cites·18 claims
- 0390US11031954B1Data decoding method using LDPC code as error correction code and data transmitting method thereofUNIV NATIONAL CHIAO TUNG·Filed 2020·Granted Jun 8, 2021·3 cites·16 claims
- 0488US7724163B2Apparatus of multi-stage network for iterative decoding and method thereofUNIV NAT CHIAO TUNG·Filed 2008·Granted May 25, 2010·27 cites·13 claims
- 0580US8958243B2Group classification method for solid state storage deviceLITE ON IT CORP·Filed 2013·Granted Feb 17, 2015·7 cites·10 claims
- 0678US10128982B2Extended polar codesMACRONIX INT CO LTD·Filed 2016·Granted Nov 13, 2018·4 cites·11 claims
- 0776US6119262AMethod and apparatus for solving key equation polynomials in decoding error correction codesSHUNG CHUEN SHEN BERNARD·Filed 1997·Granted Sep 12, 2000·46 cites·10 claims
- 0873US9069692B2Fully parallel encoding method and fully parallel decoding method of memory systemUNIV NAT CHIAO TUNG·Filed 2013·Granted Jun 30, 2015·4 cites·15 claims
- 0967US8639738B2Method for carry estimation of reduced-width multipliersLIAO YEN-CHIN·Filed 2011·Granted Jan 28, 2014·3 cites·4 claims
- 1066US8108762B2Operating method and circuit for low density parity check (LDPC) decoderLIU CHIH-HAO·Filed 2007·Granted Jan 31, 2012·7 cites·14 claims
- 1165US7719442B2Multi-mode multi-parallelism data exchange method and device thereofUNIV NAT CHIAO TUNG·Filed 2008·Granted May 18, 2010·5 cites·18 claims
- 1264US8255775B2Method and apparatus of candidate list augmentation for channel coding systemCHANG HSIE-CHIA·Filed 2008·Granted Aug 28, 2012·4 cites·17 claims
- 1362US12493804B2Method of building and operating decoding status and prediction systemSOLID STATE STORAGE TECH CORPORATION·Filed 2021·Granted Dec 9, 2025·0 cites·7 claims
- 1460US10326586B2Encryption/decryption apparatus and power analysis protecting method thereofWINBOND ELECTRONICS CORP·Filed 2017·Granted Jun 18, 2019·1 cites·9 claims
- 1560US10110251B2Method and system for data transmissionUNIV NATIONAL CHIAO TUNG·Filed 2016·Granted Oct 23, 2018·2 cites·14 claims
- 1660US7631250B2Method and apparatus for self-compensation on belief-propagation algorithmUNIV NAT CHIAO TUNG·Filed 2006·Granted Dec 8, 2009·4 cites·12 claims
- 1757US7243277B2Method of combining multilevel memory cells for an error correction schemeNAT CHIAO TUNG UINIVERSITY·Filed 2005·Granted Jul 10, 2007·5 cites·5 claims
- 1856US7724770B2Method and apparatus for switching data in communication systemUNIV NAT CHIAO TUNG·Filed 2007·Granted May 25, 2010·2 cites·19 claims
- 1955US7724772B2Method and apparatus for switching data in communication systemUNIV NAT CHIAO TUNG·Filed 2007·Granted May 25, 2010·1 cites·14 claims
- 2055US6954892B2Method for calculating syndrome polynomial in decoding error correction codesUNIV NAT CHIAO TUNG·Filed 2002·Granted Oct 11, 2005·8 cites·12 claims
- 2153US8943391B2Cyclic code decoding method and cyclic code decoderLIN YI-MIN·Filed 2012·Granted Jan 27, 2015·2 cites·12 claims
- 2251US9047982B2Data compensating method for flash memoryLITE ON TECHNOLOGY CORP·Filed 2012·Granted Jun 2, 2015·1 cites·13 claims
- 2350US9299459B2Method and apparatus of measuring error correction data for memoryMACRONIX INT CO LTD·Filed 2013·Granted Mar 29, 2016·1 cites·18 claims
- 2449US2019164068A1Method of building and operating decoding status and prediction systemLITE ON TECHNOLOGY CORP·Filed 2018·Application pending·0 cites
- 2546US7941734B2Method and apparatus for decoding shortened BCH codes or reed-solomon codesUNIV NAT CHIAO TUNG·Filed 2008·Granted May 10, 2011·2 cites·12 claims
- 2645US2015106667A1Solid state storage device and controlling method thereofLITE ON IT CORP·Filed 2013·Application pending·0 cites
- 2745US2008159441A1Method and apparatus for carry estimation of reduced-width multipliersUNIV NAT CHIAO TUNG·Filed 2007·Application pending·0 cites
- 2843US10523239B2Method for generating encoded data that is encoded based on low-density parity-check codes, and method for decoding the encoded dataUNIV NATIONAL CHIAO TUNG·Filed 2018·Granted Dec 31, 2019·0 cites·11 claims
- 2943US2013047056A1Flash memory device with rectifiable redundancy and method of controlling the sameLITE ON IT CORP·Filed 2012·Application pending·0 cites
- 3040US10886944B2Low-density parity-check code scaling methodUNIV NATIONAL CHIAO TUNG·Filed 2018·Granted Jan 5, 2021·0 cites·6 claims
- 3140US2012159187A1Electronic device and method for protecting against differential power analysis attackLIU PO-CHUN·Filed 2011·Application pending·0 cites
- 3237US2014365172A1Method for estimating distribution curve of storing state of solid state storage deviceLITE ON IT CORP·Filed 2013·Application pending·0 cites
- 3336US10103841B2Method and device for de-puncturing turbo-coded digital data, and turbo decoder systemUNIV NATIONAL CHIAO TUNG·Filed 2017·Granted Oct 16, 2018·0 cites·10 claims
- 3436US9460801B2Method and system for determining storing state of flash memoryLITE ON ELECTRONICS GUANGZHOU LTD·Filed 2013·Granted Oct 4, 2016·0 cites·6 claims
- 3536US2003126543A1Method and apparatus for solving key equation polynomials in decoding error correction codesFiled 2002·Application pending·0 cites
- 3636US2003131308A1Method and apparatus for solving key equation polynomials in decoding error correction codesFiled 2002·Application pending·0 cites
- 3735US2019319638A1Method for generating encoded data that is encoded based on low-density parity-check codes, and method for decoding the encoded dataUNIV NATIONAL CHIAO TUNG·Filed 2018·Application pending·0 cites
- 3834US2008189346A1Method for realizing finite field divider architectureWU JAU-YET·Filed 2007·Application pending·0 cites
- 3933US2014149828A1Solid state drive and joint encoding/decoding method thereofLITE ON IT CORP·Filed 2013·Application pending·0 cites
- 4032US8645807B2Apparatus and method of processing polynomialsLIN YI-MIN·Filed 2010·Granted Feb 4, 2014·0 cites·16 claims
- 4132US2017111060A1Method and device for performing polar codes channel-aware procedureMACRONIX INT CO LTD·Filed 2016·Application pending·0 cites
- 4232US2006236197A1Transmission method combining trellis coded modulation and low-density parity check code and architecture thereofLIN CHIEN-CHING·Filed 2005·Application pending·0 cites
- 4332US2015363450A1Bayesian sequential partition system in multi-dimensional data space and counting engine thereofUNIV NAT CHIAO TUNG·Filed 2015·Application pending·0 cites
- 4429US9455724B2Readout systemUNIV NAT CHIAO TUNG·Filed 2015·Granted Sep 27, 2016·0 cites·22 claims
- 4526US2006242533A1Method for updating check-node of low-density parity-check (LDPC) codes decoder and device using the sameLEE CHEN-YI·Filed 2005·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →