Inventor · disambiguated record
Hsiao-Shu Chao
Also filed as: CHAO HSIAO-SHU
32 granted patents·1,204 citations·filing 2008–2014
97Inventor score
Files withTAIWAN SEMICONDUCTOR MFG12SU KE-YING5HSU CHIN-CHANG4LU LEE-CHUNG2TAIWAN SEMICONDUCTOR MFG CO LTD2
Top patents by PatentIndex Score
32 records- 0198US8826213B1Parasitic capacitance extraction for FinFETsTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Sep 2, 2014·440 cites·20 claims
- 0297US8887106B2Method of generating a bias-adjusted layout design of a conductive feature and method of generating a simulation model of a predefined fabrication processHO CHIA-MING·Filed 2012·Granted Nov 11, 2014·414 cites·20 claims
- 0397US8448100B1Tool and method for eliminating multi-patterning conflictsLIN HUNG LUNG·Filed 2012·Granted May 21, 2013·102 cites·18 claims
- 0496US8473873B2Multi-patterning methodHSU CHIN-CHANG·Filed 2011·Granted Jun 25, 2013·17 cites·20 claims
- 0596US8468470B2Multi-patterning methodHSU CHIN-CHANG·Filed 2011·Granted Jun 18, 2013·18 cites·22 claims
- 0695US8775977B2Decomposition and marking of semiconductor device design layout in double patterning lithographyHSU CHIN-CHANG·Filed 2011·Granted Jul 8, 2014·13 cites·17 claims
- 0794US8732628B1Method and system for photomask assignment for double patterning technologyTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted May 20, 2014·24 cites·20 claims
- 0894US8434043B1Methodology for analysis and fixing guidance of pre-coloring layoutHSU CHIN-CHANG·Filed 2012·Granted Apr 30, 2013·31 cites·20 claims
- 0994US8119310B1Mask-shift-aware RC extraction for double patterning designLU LEE-CHUNG·Filed 2010·Granted Feb 21, 2012·11 cites·20 claims
- 1091US9081933B2Methods and apparatus for RC extractionTAIWAN SEMICONDUCTOR MFG·Filed 2014·Granted Jul 14, 2015·19 cites·20 claims
- 1191US8448120B2RC extraction for single patterning spacer techniqueHUANG CHENG-I·Filed 2011·Granted May 21, 2013·25 cites·18 claims
- 1290US8252489B2Mask-shift-aware RC extraction for double patterning designSU KE-YING·Filed 2011·Granted Aug 28, 2012·7 cites·20 claims
- 1388US8001494B2Table-based DFM for accurate post-layout analysisTAIWAN SEMICONDUCTOR MFG·Filed 2008·Granted Aug 16, 2011·16 cites·20 claims
- 1487US8645877B2Multi-patterning methodTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Feb 4, 2014·4 cites·20 claims
- 1587US8037575B2Method for shape and timing equivalent dimension extractionTAIWAN SEMICONDUCTOR MFG·Filed 2008·Granted Oct 18, 2011·17 cites·18 claims
- 1684US9262558B2RC extraction for single patterning spacer techniqueTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted Feb 16, 2016·3 cites·20 claims
- 1782US8453095B2Systems and methods for creating frequency-dependent netlistSU KE-YING·Filed 2011·Granted May 28, 2013·7 cites·20 claims
- 1880US9275186B2Optimization for circuit migrationTAIWAN SEMICONDUCTOR MFG·Filed 2014·Granted Mar 1, 2016·5 cites·17 claims
- 1980US8751975B2RC corner solutions for double patterning technologySU KE-YING·Filed 2012·Granted Jun 10, 2014·6 cites·13 claims
- 2077US8726212B1Streamlined parasitic modeling with common device profileTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted May 13, 2014·4 cites·20 claims
- 2176US9021412B2RC extraction methodology for floating silicon substrate with TSVTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted Apr 28, 2015·3 cites·18 claims
- 2273US8707245B2Semiconductor device design method, system and computer-readable mediumYANG CHING-SHUN·Filed 2012·Granted Apr 22, 2014·3 cites·20 claims
- 2372US8495532B2Systems and methods for creating frequency-dependent RC extraction netlistSU KE-YING·Filed 2011·Granted Jul 23, 2013·3 cites·20 claims
- 2471US9672315B2Optimization for circuit migrationLU LEE-CHUNG·Filed 2010·Granted Jun 6, 2017·3 cites·20 claims
- 2570US8607179B2RC extraction methodology for floating silicon substrate with TSVWU ZE-MING·Filed 2012·Granted Dec 10, 2013·3 cites·18 claims
- 2669US9361423B2RC corner solutions for double patterning technologyTAIWAN SEMICONDUCTOR MFG·Filed 2014·Granted Jun 7, 2016·2 cites·20 claims
- 2768US8418117B2Chip-level ECO shrinkCHEN HUANG-YU·Filed 2010·Granted Apr 9, 2013·2 cites·26 claims
- 2865US8671382B2Method of generating RC technology fileTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Mar 11, 2014·1 cites·20 claims
- 2963US8201111B2Table-based DFM for accurate post-layout analysisHOU YUNG-CHIN·Filed 2011·Granted Jun 12, 2012·1 cites·20 claims
- 3057US9230052B2Method of generating a simulation model of a predefined fabrication processTAIWAN SEMICONDUCTOR MFG·Filed 2014·Granted Jan 5, 2016·0 cites·20 claims
- 3151US8793640B1Methods and apparatus for RC extractionTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Jul 29, 2014·0 cites·19 claims
- 3249US8418112B2Method of generating RC technology fileSU KE-YING·Filed 2011·Granted Apr 9, 2013·0 cites·22 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →