Inventor · disambiguated record
Hung Y. Ng
Also filed as: NG HUNG · NG HUNG Y · NG HUNG YIP
16 granted patents·3 pending applications·249 citations·filing 1987–2011
93Inventor score
Top patents by PatentIndex Score
19 records- 0188US6030541AProcess for defining a pattern using an anti-reflective coating and structure thereforIBM·Filed 1998·Granted Feb 29, 2000·105 cites·18 claims
- 0287US7772676B2Strained semiconductor device and method of making sameINFINEON TECHNOLOGIES AG·Filed 2006·Granted Aug 10, 2010·13 cites·17 claims
- 0385US7452784B2Formation of improved SOI substrates using bulk semiconductor wafersIBM·Filed 2006·Granted Nov 18, 2008·11 cites·1 claims
- 0485US6884734B2Vapor phase etch trim structure with top etch blocking layerIBM·Filed 2001·Granted Apr 26, 2005·38 cites·38 claims
- 0583US7442619B2Method of forming substantially L-shaped silicide contact for a semiconductor deviceIBM·Filed 2006·Granted Oct 28, 2008·9 cites·2 claims
- 0680US7785950B2Dual stress memory technique method and related structureIBM·Filed 2005·Granted Aug 31, 2010·9 cites·13 claims
- 0778US8268698B2Formation of improved SOI substrates using bulk semiconductor wafersHENSON WILLIAM K·Filed 2011·Granted Sep 18, 2012·4 cites·9 claims
- 0873US4734157ASelective and anisotropic dry etchingIBM·Filed 1987·Granted Mar 29, 1988·44 cites·26 claims
- 0965US7064027B2Method and structure to use an etch resistant liner on transistor gate structure to achieve high device performanceIBM·Filed 2003·Granted Jun 20, 2006·9 cites·20 claims
- 1064US7307323B2Structure to use an etch resistant liner on transistor gate structure to achieve high device performanceIBM·Filed 2006·Granted Dec 11, 2007·2 cites·1 claims
- 1156US8039331B2Opto-thermal annealing methods for forming metal gate and fully silicided gate-field effect transistorsIBM·Filed 2008·Granted Oct 18, 2011·0 cites·8 claims
- 1254US7932158B2Formation of improved SOI substrates using bulk semiconductor wafersIBM·Filed 2008·Granted Apr 26, 2011·0 cites·14 claims
- 1352US8643119B2Substantially L-shaped silicide for contactLUO ZHIJIONG·Filed 2008·Granted Feb 4, 2014·0 cites·6 claims
- 1452US7410852B2Opto-thermal annealing methods for forming metal gate and fully silicided gate field effect transistorsIBM·Filed 2006·Granted Aug 12, 2008·0 cites·1 claims
- 1542US2007293016A1Semiconductor structure including isolation region with variable linewidth and method for fabrication therofIBM·Filed 2006·Application pending·0 cites
- 1642US2009242989A1Complementary metal-oxide-semiconductor device with embedded stressorCHAN KEVIN K·Filed 2008·Application pending·0 cites
- 1733US6656375B1Selective nitride: oxide anisotropic etch processIBM·Filed 1998·Granted Dec 2, 2003·3 cites·15 claims
- 1833US2002142252A1Method for polysilicon conductor (PC) Trimming for shrinking critical dimension and isolated-nested offset correctionIBM·Filed 2001·Application pending·0 cites
- 1932US6369434B1Nitrogen co-implantation to form shallow junction-extensions of p-type metal oxide semiconductor field effect transistorsIBM·Filed 1999·Granted Apr 9, 2002·2 cites·4 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →