Inventor · disambiguated record
Huaixin Xian
Also filed as: Xian Huaixin
18 granted patents·12 pending applications·9 citations·filing 2021–2025
89Inventor score
Files withTAIWAN SEMICONDUCTOR MFG CO LTD30
Top patents by PatentIndex Score
30 records- 0195US11942945B2Method for forming a timing circuit arrangements for flip-flopsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Mar 26, 2024·2 cites·20 claims
- 0294US12099090B2Multiplexer for SDFQ having differently-sized scan and data transistors, semiconductor device including same and methods of manufacturing sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Sep 24, 2024·2 cites·20 claims
- 0393US11469743B1Timing circuit arrangements for flip-flopsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Oct 11, 2022·2 cites·20 claims
- 0490US12199612B2Flip-flop with transistors having different threshold voltages, semiconductor device including same and methods of manufacturing sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Jan 14, 2025·1 cites·20 claims
- 0590US11838026B2Method of and apparatus for controlling clock signalTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Dec 5, 2023·2 cites·20 claims
- 0688US2025364976A1Bi-directional scan flip-flop circuit and methodTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 0787US2025357920A1Flip-flop with transistors having different threshold voltages and semiconductor device including sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 0884US12375069B2Method for forming a timing circuit arrangements for flip-flopsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Granted Jul 29, 2025·0 cites·20 claims
- 0981US12283591B2Integrated circuit deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Apr 22, 2025·0 cites·20 claims
- 1080US2025364252A1Methods of forming semiconductor device with t-shaped active regionTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 1179US2025317140A1Semiconductor device with common deep n-well for different voltage domains and method of forming sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 1279US2025096783A1Bi-directional scan flip-flop circuit and methodTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 1378US2025255002A1Integrated circuit device and method of manufacturingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 1478US2024388280A1Methods of manufacturing flip-flop with transistors having different threshold voltages and semiconductor device including sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 1576US12224755B2Method of and apparatus for controlling clock signalTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Feb 11, 2025·0 cites·20 claims
- 1676US2024369629A1Multiplexer for sdfq having differently-sized scan and data transistors, semiconductor device including same and methods of manufacturing sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 1773US12166487B2Bi-directional scan flip-flop circuit and methodTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Dec 10, 2024·0 cites·20 claims
- 1873US11821947B1Multiplexer for SDFQ having differently-sized scan and data transistors, semiconductor device including same and methods of manufacturing sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Nov 21, 2023·0 cites·20 claims
- 1973US2025348650A1Method of forming current-distributing pin structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 2073US2025183881A1Method of and apparatus for controlling clock signalTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 2171US11862621B2Integrated circuit deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Jan 2, 2024·0 cites·20 claims
- 2267US12368436B2Semiconductor device with common deep N-well for different voltage domains and method of forming sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Jul 22, 2025·0 cites·20 claims
- 2366US2023359798A1Circuit arrangements having reduced dependency on layout environmentTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Application pending·0 cites
- 2464US12482659B2Semiconductor device with T-shaped active region and methods of forming sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Nov 25, 2025·0 cites·20 claims
- 2562US12477831B2Semiconductor device having interleaved clock gate blocks and decoupling capacitor blocks and method of operating sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Nov 18, 2025·0 cites·20 claims
- 2662US12015410B2Semiconductor device with daisy-chained delay cells and method of forming sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Jun 18, 2024·0 cites·20 claims
- 2760US12423495B2Current-distributing pin structure and method of forming sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Sep 23, 2025·0 cites·20 claims
- 2859US11699015B2Circuit arrangements having reduced dependency on layout environmentTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Jul 11, 2023·0 cites·20 claims
- 2959US2025301725A1Semiconductor deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 3055US12426379B2Semiconductor device having interleaved clock gate blocks and decoupling capacitor blocks and method of operating sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Sep 23, 2025·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →