Inventor · disambiguated record
Hyo Gyuem Rhew
Also filed as: RHEW HYO GYUEM
6 granted patents·54 citations·filing 2013–2023
81Inventor score
Files withSAMSUNG ELECTRONICS CO LTD2AVAGO TECH INT SALES PTE LID1AVAGO TECHNOLOGIES GENERAL IP1BROADCOM CORP1UNIV MICHIGAN1
Top patents by PatentIndex Score
6 records- 0194US9685969B1Time-interleaved high-speed digital-to-analog converter (DAC) architecture with spur calibrationAVAGO TECHNOLOGIES GENERAL IP·Filed 2016·Granted Jun 20, 2017·19 cites·20 claims
- 0287US11804945B2Reset synchronizing circuit and glitchless clock buffer circuit for preventing start-up failure, and IQ divider circuitSAMSUNG ELECTRONICS CO LTD·Filed 2022·Granted Oct 31, 2023·2 cites·19 claims
- 0385US9344268B1Phase alignment architecture for ultra high-speed data pathBROADCOM CORP·Filed 2015·Granted May 17, 2016·6 cites·20 claims
- 0483US8892208B2Closed-loop neural stimulationUNIV MICHIGAN·Filed 2013·Granted Nov 18, 2014·22 cites·19 claims
- 0582US10277210B1Clock skew suppression for time-interleaved clocksAVAGO TECH INT SALES PTE LID·Filed 2017·Granted Apr 30, 2019·5 cites·20 claims
- 0664US12212645B2Reset synchronizing circuit and glitchless clock buffer circuit for preventing start-up failure, and IQ divider circuitSAMSUNG ELECTRONICS CO LTD·Filed 2023·Granted Jan 28, 2025·0 cites·19 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →