Inventor · disambiguated record
Ingrid E. Magdo
Also filed as: MAGDO INGRID E · MAGDO INGRID EMESE
31 granted patents·842 citations·filing 1972–1988
98Inventor score
Files withIBM31
Top patents by PatentIndex Score
31 records- 0190US3954523AProcess for fabricating devices having dielectric isolation utilizing anodic treatment and selective oxidationIBM·Filed 1975·Granted May 4, 1976·60 cites·10 claims
- 0289US4256532AMethod for making a silicon maskIBM·Filed 1978·Granted Mar 17, 1981·55 cites·7 claims
- 0387US4396933ADielectrically isolated semiconductor devicesIBM·Filed 1973·Granted Aug 2, 1983·33 cites·19 claims
- 0487US3944447AMethod for fabrication of integrated circuit structure with full dielectric isolation utilizing selective oxidationIBM·Filed 1973·Granted Mar 16, 1976·34 cites·9 claims
- 0584US4359816ASelf-aligned metal process for field effect transistor integrated circuitsIBM·Filed 1980·Granted Nov 23, 1982·61 cites·28 claims
- 0681US3955269AFabricating high performance integrated bipolar and complementary field effect transistorsIBM·Filed 1975·Granted May 11, 1976·43 cites·23 claims
- 0780US3995301ANovel integratable Schottky Barrier structure and a method for the fabrication thereofIBM·Filed 1974·Granted Nov 30, 1976·23 cites·12 claims
- 0878US4400865ASelf-aligned metal process for integrated circuit metallizationIBM·Filed 1980·Granted Aug 30, 1983·46 cites·43 claims
- 0977US4028717AField effect transistor having improved threshold stabilityIBM·Filed 1975·Granted Jun 7, 1977·17 cites·7 claims
- 1076US4805683AMethod for producing a plurality of layers of metallurgyIBM·Filed 1988·Granted Feb 21, 1989·50 cites·14 claims
- 1175US4357622AComplementary transistor structureIBM·Filed 1980·Granted Nov 2, 1982·41 cites·5 claims
- 1275US4023197AIntegrated circuit chip carrier and method for forming the sameIBM·Filed 1975·Granted May 10, 1977·33 cites·14 claims
- 1374US4424621AMethod to fabricate stud structure for self-aligned metallizationIBM·Filed 1981·Granted Jan 10, 1984·39 cites·25 claims
- 1471US4758528ASelf-aligned metal process for integrated circuit metallizationIBM·Filed 1986·Granted Jul 19, 1988·38 cites·23 claims
- 1567US4005471ASemiconductor resistor having a high value resistance for use in an integrated circuit semiconductor deviceIBM·Filed 1975·Granted Jan 25, 1977·15 cites·10 claims
- 1667US3956527ADielectrically isolated Schottky Barrier structure and method of forming the sameIBM·Filed 1974·Granted May 11, 1976·14 cites·7 claims
- 1765US4089712AEpitaxial process for the fabrication of a field effect transistor having improved threshold stabilityIBM·Filed 1977·Granted May 16, 1978·11 cites·6 claims
- 1865US4016596AHigh performance integrated bipolar and complementary field effect transistorsIBM·Filed 1976·Granted Apr 5, 1977·24 cites·7 claims
- 1965US4002511AMethod for forming masks comprising silicon nitride and novel mask structures produced therebyIBM·Filed 1975·Granted Jan 11, 1977·21 cites·9 claims
- 2064US4485552AComplementary transistor structure and method for manufactureIBM·Filed 1982·Granted Dec 4, 1984·27 cites·10 claims
- 2162US4452645AMethod of making emitter regions by implantation through a non-monocrystalline layerIBM·Filed 1981·Granted Jun 5, 1984·24 cites·11 claims
- 2261US4322883ASelf-aligned metal process for integrated injection logic integrated circuitsIBM·Filed 1980·Granted Apr 6, 1982·25 cites·13 claims
- 2360US4044454AMethod for forming integrated circuit regions defined by recessed dielectric isolationIBM·Filed 1975·Granted Aug 30, 1977·18 cites·6 claims
- 2459US4513303ASelf-aligned metal field effect transistor integrated circuitIBM·Filed 1982·Granted Apr 23, 1985·21 cites·5 claims
- 2558US4154626AProcess of making field effect transistor having improved threshold stability by ion-implantationIBM·Filed 1978·Granted May 15, 1979·8 cites·4 claims
- 2652US4261003AIntegrated circuit structures with full dielectric isolation and a novel method for fabrication thereofIBM·Filed 1979·Granted Apr 7, 1981·13 cites·7 claims
- 2751US4079408ASemiconductor structure with annular collector/subcollector regionIBM·Filed 1975·Granted Mar 14, 1978·8 cites·21 claims
- 2849US4534806AMethod for manufacturing vertical PNP transistor with shallow emitterIBM·Filed 1983·Granted Aug 13, 1985·15 cites·10 claims
- 2947US4149915AProcess for producing defect-free semiconductor devices having overlapping high conductivity impurity regionsIBM·Filed 1978·Granted Apr 17, 1979·10 cites·5 claims
- 3044US4608589ASelf-aligned metal structure for integrated circuitsIBM·Filed 1983·Granted Aug 26, 1986·11 cites·16 claims
- 3140US4965652ADielectric isolation for high density semiconductor devicesIBM·Filed 1972·Granted Oct 23, 1990·4 cites·9 claims
Join the waitlist — get patent alerts
Get an alert when Ingrid E. Magdo files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →