Inventor · disambiguated record
Jamie R. Kuesel
Also filed as: KUESEL JAMIE · KUESEL JAMIE R · KUESEL JAMIE RANDALL
41 granted patents·4 pending applications·672 citations·filing 2004–2021
98Inventor score
Top patents by PatentIndex Score
45 records- 0199US11068318B2Dynamic thread status retrieval using inter-thread communicationIBM·Filed 2019·Granted Jul 20, 2021·143 cites·11 claims
- 0299US7884819B2Pixel color accumulation in a ray tracing image processing systemIBM·Filed 2006·Granted Feb 8, 2011·142 cites·11 claims
- 0398US7940265B2Multiple spacial indexes for dynamic scene management in graphics renderingIBM·Filed 2006·Granted May 10, 2011·133 cites·19 claims
- 0496US7991978B2Network on chip with low latency, high bandwidth application messaging interconnects that abstract hardware inter-thread data communications into an architected state of a processorIBM·Filed 2008·Granted Aug 2, 2011·60 cites·22 claims
- 0592US7917703B2Network on chip that maintains cache coherency with invalidate commandsIBM·Filed 2007·Granted Mar 29, 2011·29 cites·16 claims
- 0689US8010750B2Network on chip that maintains cache coherency with invalidate commandsIBM·Filed 2008·Granted Aug 30, 2011·20 cites·16 claims
- 0788US9256574B2Dynamic thread status retrieval using inter-thread communicationIBM·Filed 2013·Granted Feb 9, 2016·7 cites·11 claims
- 0888US8990833B2Indirect inter-thread communication using a shared pool of inboxesKUESEL JAMIE R·Filed 2011·Granted Mar 24, 2015·12 cites·22 claims
- 0986US8018466B2Graphics rendering on a network on chipIBM·Filed 2008·Granted Sep 13, 2011·15 cites·20 claims
- 1085US9256573B2Dynamic thread status retrieval using inter-thread communicationIBM·Filed 2013·Granted Feb 9, 2016·5 cites·18 claims
- 1183US8776035B2Providing performance tuned versions of compiled code to a CPU in a system of heterogeneous coresIBM·Filed 2012·Granted Jul 8, 2014·6 cites·4 claims
- 1282US9239791B2Cache swizzle with inline transpositionIBM·Filed 2013·Granted Jan 19, 2016·5 cites·11 claims
- 1382US7234017B2Computer system architecture for a processor connected to a high speed bus transceiverIBM·Filed 2005·Granted Jun 19, 2007·14 cites·32 claims
- 1481US9134779B2Power distribution management in a system on a chipIBM·Filed 2012·Granted Sep 15, 2015·6 cites·18 claims
- 1578US11233515B2Scheduling of tasks for execution in parallel based on geometric reachMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2020·Granted Jan 25, 2022·1 cites·20 claims
- 1677US9195443B2Providing performance tuned versions of compiled code to a CPU in a system of heterogeneous coresKUESEL JAMIE R·Filed 2012·Granted Nov 24, 2015·4 cites·6 claims
- 1777US7992001B2Preventing execution of software without a dynamically generated keyIBM·Filed 2007·Granted Aug 2, 2011·7 cites·20 claims
- 1875US9244840B2Cache swizzle with inline transpositionIBM·Filed 2012·Granted Jan 26, 2016·3 cites·9 claims
- 1975US7296108B2Apparatus and method for efficient transmission of unaligned dataIBM·Filed 2005·Granted Nov 13, 2007·7 cites·7 claims
- 2074US10545797B2Dynamic thread status retrieval using inter-thread communicationIBM·Filed 2016·Granted Jan 28, 2020·1 cites·11 claims
- 2174US8719404B2Regular expression searches utilizing general purpose processors on a network interconnectKUESEL JAMIE R·Filed 2011·Granted May 6, 2014·4 cites·17 claims
- 2273US7362705B2Dynamic load-based credit distributionIBM·Filed 2004·Granted Apr 22, 2008·15 cites·12 claims
- 2372US8230179B2Administering non-cacheable memory load instructionsKRIEGEL JON K·Filed 2008·Granted Jul 24, 2012·5 cites·18 claims
- 2469US7660247B2Dynamic load-based credit distributionIBM·Filed 2008·Granted Feb 9, 2010·3 cites·8 claims
- 2568US11269690B2Dynamic thread status retrieval using inter-thread communicationIBM·Filed 2019·Granted Mar 8, 2022·0 cites·12 claims
- 2668US9134778B2Power distribution management in a system on a chipIBM·Filed 2012·Granted Sep 15, 2015·2 cites·17 claims
- 2767US9176885B2Combined cache inject and lock operationKUESEL JAMIE R·Filed 2012·Granted Nov 3, 2015·2 cites·24 claims
- 2864US11671102B2Scheduling of tasks for execution in parallel based on geometric reachMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2021·Granted Jun 6, 2023·0 cites·20 claims
- 2964US9600346B2Thread scheduling across heterogeneous processing elements with resource mappingIBM·Filed 2013·Granted Mar 21, 2017·1 cites·20 claims
- 3063US7409558B2Low-latency data decryption interfaceIBM·Filed 2004·Granted Aug 5, 2008·7 cites·6 claims
- 3161US7496753B2Data encryption interface for reducing encrypt latency impact on standard trafficIBM·Filed 2004·Granted Feb 24, 2009·5 cites·5 claims
- 3259US10534654B2Dynamic thread status retrieval using inter-thread communicationIBM·Filed 2016·Granted Jan 14, 2020·0 cites·14 claims
- 3359US8078850B2Branch prediction technique using instruction for resetting result table pointerKUESEL JAMIE R·Filed 2008·Granted Dec 13, 2011·1 cites·15 claims
- 3459US7469312B2Computer system bus bridgeIBM·Filed 2005·Granted Dec 23, 2008·1 cites·11 claims
- 3557US8069353B2Low-latency data decryption interfaceBEUKEMA BRUCE L·Filed 2008·Granted Nov 29, 2011·2 cites·5 claims
- 3655US7970980B2Method and apparatus for accessing memory in a computer system architecture supporting heterogeneous configurations of memory structuresIBM·Filed 2004·Granted Jun 28, 2011·4 cites·10 claims
- 3754US2009144564A1Data encryption interface for reducing encrypt latency impact on standard trafficIBM·Filed 2009·Application pending·0 cites
- 3853US7757032B2Computer system bus bridgeIBM·Filed 2008·Granted Jul 13, 2010·0 cites·9 claims
- 3952US12230439B2Inductor tuning in superconducting circuitsMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2021·Granted Feb 18, 2025·0 cites·20 claims
- 4050US9606841B2Thread scheduling across heterogeneous processing elements with resource mappingIBM·Filed 2015·Granted Mar 28, 2017·0 cites·9 claims
- 4149US8385554B2Preventing execution of pirated softwareIBM·Filed 2007·Granted Feb 26, 2013·0 cites·11 claims
- 4248US2012215988A1Administering Non-Cacheable Memory Load InstructionsKRIEGEL JON K·Filed 2012·Application pending·0 cites
- 4347US7840757B2Method and apparatus for providing high speed memory for a processing unitIBM·Filed 2004·Granted Nov 23, 2010·0 cites·20 claims
- 4442US2008010321A1Method and system for coherent data correctness checking using a global visibility and persistent memory modelIBM·Filed 2006·Application pending·0 cites
- 4541US2012260252A1Scheduling software thread executionKUESEL JAMIE R·Filed 2011·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →