Inventor · disambiguated record
James P. Mazza
Also filed as: MAZZA JAMES · MAZZA JAMES P
8 granted patents·34 pending applications·3 citations·filing 1975–2024
74Inventor score
Top patents by PatentIndex Score
42 records- 0176US11276651B2IC product comprising a single active fin FinFET device and an electrically inactive fin stress reduction structureGLOBALFOUNDRIES US INC·Filed 2020·Granted Mar 15, 2022·1 cites·17 claims
- 0270US11205648B2IC structure with single active region having different doping profile than set of active regionsGLOBALFOUNDRIES US INC·Filed 2020·Granted Dec 21, 2021·1 cites·17 claims
- 0367US12457799B2Antenna structureGLOBALFOUNDRIES US INC·Filed 2023·Granted Oct 28, 2025·0 cites·17 claims
- 0462US11913971B2Motion-sensitive field effect transistor, motion detection system, and methodGLOBALFOUNDRIES US INC·Filed 2021·Granted Feb 27, 2024·0 cites·20 claims
- 0562US2025391770A1Integrated circuit including multiple device layersIBM·Filed 2024·Application pending·0 cites
- 0662US2024387668A1Nanosheet structures with tunable channels and inner sidewall spacersGLOBALFOUNDRIES US INC·Filed 2023·Application pending·0 cites
- 0762US2025379145A1Stacked fet with backside replacement metal gateIBM·Filed 2024·Application pending·0 cites
- 0861US12424493B2Self-aligned double patterning with mandrel manipulationGLOBALFOUNDRIES US INC·Filed 2022·Granted Sep 23, 2025·0 cites·20 claims
- 0961US2025374666A1Flexible arrangement of semiconductor devicesIBM·Filed 2024·Application pending·0 cites
- 1060US2025253238A1Backside to frontside connection between different metal tracksIBM·Filed 2024·Application pending·0 cites
- 1160US2025293145A1Interconnect structure with intra-level metal line connectorsIBM·Filed 2024·Application pending·0 cites
- 1260US2025380503A1Self-aligned backside cutIBM·Filed 2024·Application pending·0 cites
- 1360US2025393271A1Asymmetrical backside contact for shifted stacked transistorIBM·Filed 2024·Application pending·0 cites
- 1460US2025267903A1Gate contact with concurrent tie-down connectionIBM·Filed 2024·Application pending·0 cites
- 1559US12438078B2Local interconnect power rails and upper power railsGLOBALFOUNDRIES US INC·Filed 2022·Granted Oct 7, 2025·0 cites·17 claims
- 1659US2025301674A1Trench capacitor in backside diffusion breakIBM·Filed 2024·Application pending·0 cites
- 1759US2025351558A1Semiconductor device with gate strap in sti regionIBM·Filed 2024·Application pending·0 cites
- 1859US2025212523A1Signal routing path using free backside wiresIBM·Filed 2023·Application pending·0 cites
- 1959US2025275233A1Stacked structures with split device layersIBM·Filed 2024·Application pending·0 cites
- 2059US2025194182A1Stacked device structures with varying layer characteristicsIBM·Filed 2023·Application pending·0 cites
- 2159US2025300076A1Stacked complimentary metal-oxide semiconductor structureIBM·Filed 2024·Application pending·0 cites
- 2259US2025204048A1Self-aligned backside channel removalIBM·Filed 2023·Application pending·0 cites
- 2359US2025203974A1Frontside-to-backside connection with cut for stacked transistorIBM·Filed 2023·Application pending·0 cites
- 2459US2025226313A1Interconnect lines with line width profileIBM·Filed 2024·Application pending·0 cites
- 2559US2025254972A1Logic cross-couple with backside interconnectsIBM·Filed 2024·Application pending·0 cites
- 2659US2025194164A1Local interconnect in sequential stackingIBM·Filed 2023·Application pending·0 cites
- 2758US2025105061A1Self-aligned contact for field effect transistorsIBM·Filed 2023·Application pending·0 cites
- 2858US2025194161A1Backside signal contact and power formation for stacked transistorsIBM·Filed 2023·Application pending·0 cites
- 2958US2025096128A1Bottom contact jumpers for stacked field effect transistor semiconductorsIBM·Filed 2023·Application pending·0 cites
- 3057US2025048695A1Multi-gate fet with self-aligned tapered active region edgeIBM·Filed 2023·Application pending·0 cites
- 3157US2025159963A1Reduced gate edge capacitanceIBM·Filed 2023·Application pending·0 cites
- 3256US12046651B2Logic cell layout design for high density transistorsGLOBALFOUNDRIES US INC·Filed 2021·Granted Jul 23, 2024·0 cites·20 claims
- 3356US2025048675A1Multi-gate transistor with concave and convex edgesIBM·Filed 2023·Application pending·0 cites
- 3456US2025212508A1Stacked transistor structures with aligned cell boundaries and shifted channelsIBM·Filed 2023·Application pending·0 cites
- 3555US2025072113A1Stacked FET With Local ContactIBM·Filed 2023·Application pending·0 cites
- 3655US2025192054A1Second air gap type for subtractive interconnectsIBM·Filed 2023·Application pending·0 cites
- 3755US2025081525A1Via To Avoid Local Interconnect ShortingIBM·Filed 2023·Application pending·0 cites
- 3853US2025040167A1Gate-all-around field effect transistorsGLOBALFOUNDRIES US INC·Filed 2023·Application pending·0 cites
- 3953US2024274603A1Standard cell and ic structure with trench isolation through active regions and gate electrodesGLOBALFOUNDRIES US INC·Filed 2023·Application pending·0 cites
- 4052US2025212506A1Split gate contacts for vertically stacked transistorsIBM·Filed 2023·Application pending·0 cites
- 4151US2024347638A1Multi-fin fin-type field effect transistor with fine-tuned effective channel widthGLOBALFOUNDRIES US INC·Filed 2023·Application pending·0 cites
- 4224USD243739SMeat lifting tongsMAZZA JAMES P·Filed 1975·Granted Mar 22, 1977·1 cites·1 claims
Join the waitlist — get patent alerts
Get an alert when James P. Mazza files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →