Inventor · disambiguated record
Jay B. Miller
Also filed as: MILLER JAY B
7 granted patents·1 pending application·268 citations·filing 1999–2004
87Inventor score
Files withINTEL CORP7
Top patents by PatentIndex Score
8 records- 0193US6434736B1Location based timing scheme in memory designINTEL CORP·Filed 1999·Granted Aug 13, 2002·160 cites·30 claims
- 0277US6449694B1Low power cache operation through the use of partial tag comparisonINTEL CORP·Filed 1999·Granted Sep 10, 2002·72 cites·27 claims
- 0365US6944713B2Low power set associative cacheINTEL CORP·Filed 2002·Granted Sep 13, 2005·13 cites·13 claims
- 0461US6487131B1Method and apparatus for testing a CAM addressed cacheINTEL CORP·Filed 1999·Granted Nov 26, 2002·15 cites·15 claims
- 0555US7480189B2Cross-coupled write circuitINTEL CORP·Filed 2002·Granted Jan 20, 2009·4 cites·5 claims
- 0642US6909651B2Method and apparatus for testing a CAM addressed cacheINTEL CORP·Filed 2004·Granted Jun 21, 2005·2 cites·8 claims
- 0742US6744655B2Method and apparatus for testing a CAM addressed cacheINTEL CORP·Filed 2002·Granted Jun 1, 2004·2 cites·9 claims
- 0836US2002080655A1Integrated circuit having synchronized pipelining and method thereforFiled 2000·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →