Inventor · disambiguated record
James J. Roman
Also filed as: ROMAN JAMES · ROMAN JAMES J
24 granted patents·2 pending applications·2,768 citations·filing 1993–2014
98Inventor score
Top patents by PatentIndex Score
26 records- 0199US6684007B2Optical coupling structures and the fabrication processesFUJITSU LTD·Filed 2001·Granted Jan 27, 2004·249 cites·4 claims
- 0298US6690845B1Three-dimensional opto-electronic modules with electrical and optical interconnections and methods for makingFUJITSU LTD·Filed 2000·Granted Feb 10, 2004·334 cites·19 claims
- 0398US6343171B1Systems based on opto-electronic substrates with electrical and optical interconnections and methods for makingFUJITSU LTD·Filed 1999·Granted Jan 29, 2002·429 cites·26 claims
- 0497US6845184B1Multi-layer opto-electronic substrates with electrical and optical interconnections and methods for makingFUJITSU LTD·Filed 1999·Granted Jan 18, 2005·286 cites·25 claims
- 0597US6785447B2Single and multilayer waveguides and fabrication processFUJITSU LTD·Filed 2001·Granted Aug 31, 2004·143 cites·7 claims
- 0697US6572780B2Methods for fabricating flexible circuit structuresFUJITSU LTD·Filed 2001·Granted Jun 3, 2003·99 cites·7 claims
- 0797US6544430B2Methods for detaching a layer from a substrateFUJITSU LTD·Filed 2001·Granted Apr 8, 2003·118 cites·8 claims
- 0896US6611635B1Opto-electronic substrates with electrical and optical interconnections and methods for makingFUJITSU LTD·Filed 1999·Granted Aug 26, 2003·193 cites·45 claims
- 0996US5854534AControlled impedence interposer substrateFUJITSU LTD·Filed 1995·Granted Dec 29, 1998·238 cites·23 claims
- 1095US7510928B2Dielectric trenches, nickel/tantalum oxide structures, and chemical mechanical polishing techniquesTRU SI TECHNOLOGIES INC·Filed 2006·Granted Mar 31, 2009·31 cites·4 claims
- 1195US6669801B2Device transfer methodFUJITSU LTD·Filed 2001·Granted Dec 30, 2003·106 cites·67 claims
- 1294US5419038AMethod for fabricating thin-film interconnectorFUJITSU LTD·Filed 1993·Granted May 30, 1995·96 cites·33 claims
- 1393US6391220B1Methods for fabricating flexible circuit structuresFUJITSU LTD INC·Filed 1999·Granted May 21, 2002·162 cites·30 claims
- 1490US9111902B2Dielectric trenches, nickel/tantalum oxide structures, and chemical mechanical polishing techniquesINVENSAS CORP·Filed 2014·Granted Aug 18, 2015·8 cites·11 claims
- 1589US5544017AMultichip module substrateFUJITSU LTD·Filed 1994·Granted Aug 6, 1996·91 cites·14 claims
- 1687US7964508B2Dielectric trenches, nickel/tantalum oxide structures, and chemical mechanical polishing techniquesALLVIA INC·Filed 2008·Granted Jun 21, 2011·16 cites·6 claims
- 1785US6102710AControlled impedance interposer substrate and method of makingFUJITSU LTD·Filed 1998·Granted Aug 15, 2000·68 cites·18 claims
- 1869US5580831ASawcut method of forming alignment marks on two faces of a substrateFUJITSU LTD·Filed 1993·Granted Dec 3, 1996·40 cites·6 claims
- 1961US6898343B2Optical switching apparatus and method for fabricatingFUJITSU LTD·Filed 2001·Granted May 24, 2005·7 cites·10 claims
- 2060US8633589B2Dielectric trenches, nickel/tantalum oxide structures, and chemical mechanical polishing techniquesSAVASTIOUK SERGEY·Filed 2007·Granted Jan 21, 2014·2 cites·19 claims
- 2160US6226171B1Power conducting substrates with high-yield integrated substrate capacitorFUJITSU LTD·Filed 1999·Granted May 1, 2001·24 cites·22 claims
- 2257US6090214ACleaning method using ammonium persulphate to remove slurry particles from CMP substratesFUJITSU LTD·Filed 1998·Granted Jul 18, 2000·14 cites·18 claims
- 2345US2008164574A1Integrated circuits with conductive features in through holes passing through other conductive features and through a semiconductor substrateSAVASTIOUK SERGEY·Filed 2008·Application pending·0 cites
- 2444US5778529AMethod of making a multichip module substrateFUJITSU LTD·Filed 1996·Granted Jul 14, 1998·10 cites·24 claims
- 2542US2008136038A1Integrated circuits with conductive features in through holes passing through other conductive features and through a semiconductor substrateSAVASTIOUK SERGEY·Filed 2006·Application pending·0 cites
- 2633US5458731AMethod for fast and non-destructive examination of etched featuresFUJITSU LTD·Filed 1994·Granted Oct 17, 1995·4 cites·9 claims
Join the waitlist — get patent alerts
Get an alert when James J. Roman files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →