Inventor · disambiguated record
James Valerio
Also filed as: VALERIO JAMES · VALERIO JAMES A
52 granted patents·29 pending applications·427 citations·filing 1987–2025
97Inventor score
Top patents by PatentIndex Score
81 records- 0197US12182062B1Multi-tile memory managementINTEL CORP·Filed 2022·Granted Dec 31, 2024·2 cites·20 claims
- 0295US11995737B2Thread scheduling over compute blocks for power optimizationINTEL CORP·Filed 2021·Granted May 28, 2024·2 cites·20 claims
- 0395US10102149B1Replacement policies for a hybrid hierarchical cacheINTEL CORP·Filed 2017·Granted Oct 16, 2018·11 cites·21 claims
- 0495US5546538ASystem for processing handwriting written by user of portable computer by server or processing by the computer when the computer no longer communicate with serverINTEL CORP·Filed 1993·Granted Aug 13, 1996·304 cites·18 claims
- 0592US12014183B2Base plus offset addressing for load/store messagesINTEL CORP·Filed 2022·Granted Jun 18, 2024·2 cites·20 claims
- 0692US2025004981A1Multi-tile memory managementINTEL CORP·Filed 2024·Application pending·0 cites
- 0791US11157283B2Instruction prefetch based on thread dispatch commandsINTEL CORP·Filed 2019·Granted Oct 26, 2021·5 cites·20 claims
- 0891US10802967B1Partial write management in a multi-tiled compute engineINTEL CORP·Filed 2019·Granted Oct 13, 2020·7 cites·21 claims
- 0989US11074109B2Dynamic load balancing of compute assets among different compute contextsINTEL CORP·Filed 2019·Granted Jul 27, 2021·5 cites·22 claims
- 1089US10521875B2Thread scheduling over compute blocks for power optimizationINTEL CORP·Filed 2017·Granted Dec 31, 2019·5 cites·16 claims
- 1188US2024086357A1Systems and methods for updating memory side caches in a multi-gpu configurationINTEL CORP·Filed 2023·Application pending·0 cites
- 1286US10373285B2Coarse grain coherencyINTEL CORP·Filed 2017·Granted Aug 6, 2019·3 cites·20 claims
- 1385US10796397B2Facilitating dynamic runtime transformation of graphics processing commands for improved graphics performance at computing devicesINTEL CORP·Filed 2015·Granted Oct 6, 2020·6 cites·20 claims
- 1482US2025077232A1Instruction prefetch based on thread dispatch commandsINTEL CORP·Filed 2024·Application pending·0 cites
- 1581US10310895B2Memory-based software barriersINTEL CORP·Filed 2017·Granted Jun 4, 2019·2 cites·14 claims
- 1680US10402224B2Microcontroller-based flexible thread scheduling launching in computing environmentsINTEL CORP·Filed 2018·Granted Sep 3, 2019·2 cites·20 claims
- 1779US12333310B2Base plus offset addressing for load/store messagesINTEL CORP·Filed 2024·Granted Jun 17, 2025·0 cites·20 claims
- 1879US12124852B2Instruction prefetch based on thread dispatch commandsINTEL CORP·Filed 2023·Granted Oct 22, 2024·0 cites·20 claims
- 1979US10324848B2Independent and separate entity-based cacheINTEL CORP·Filed 2017·Granted Jun 18, 2019·2 cites·18 claims
- 2079US2025348321A1Base plus offset addressing for load/store messagesINTEL CORP·Filed 2025·Application pending·0 cites
- 2179US2024362741A1Thread scheduling over compute blocks for power optimizationINTEL CORP·Filed 2024·Application pending·0 cites
- 2278US11977895B2Hierarchical thread scheduling based on multiple barriersINTEL CORP·Filed 2020·Granted May 7, 2024·1 cites·20 claims
- 2378US4823260AMixed-precision floating point operations from a single instruction opcodeINTEL CORP·Filed 1987·Granted Apr 18, 1989·66 cites·4 claims
- 2476US12099461B2Multi-tile memory managementINTEL CORP·Filed 2020·Granted Sep 24, 2024·0 cites·21 claims
- 2573US11762662B2Instruction prefetch based on thread dispatch commandsINTEL CORP·Filed 2021·Granted Sep 19, 2023·0 cites·20 claims
- 2673US2023039853A1Workload scheduling and distribution on a distributed graphics deviceINTEL CORP·Filed 2022·Application pending·0 cites
- 2772US10997686B2Workload scheduling and distribution on a distributed graphics deviceINTEL CORP·Filed 2019·Granted May 4, 2021·1 cites·20 claims
- 2872US2025130848A1Barrier state save and restore for preemption in a graphics environmentINTEL CORP·Filed 2024·Application pending·0 cites
- 2972US2023359499A1Dynamic load balancing of compute assets among different compute contextsINTEL CORP·Filed 2023·Application pending·0 cites
- 3071US11436695B2Coarse grain coherencyINTEL CORP·Filed 2021·Granted Sep 6, 2022·0 cites·20 claims
- 3170US11481864B2Workload scheduling and distribution on a distributed graphics deviceINTEL CORP·Filed 2021·Granted Oct 25, 2022·0 cites·20 claims
- 3269US11726826B2Dynamic load balancing of compute assets among different compute contextsINTEL CORP·Filed 2021·Granted Aug 15, 2023·0 cites·21 claims
- 3369US10949945B2Coarse grain coherencyINTEL CORP·Filed 2020·Granted Mar 16, 2021·0 cites·20 claims
- 3468US11494232B2Memory-based software barriersINTEL CORP·Filed 2020·Granted Nov 8, 2022·0 cites·16 claims
- 3567US11508338B2Register spill/fill using shared local memory spaceINTEL CORP·Filed 2020·Granted Nov 22, 2022·0 cites·10 claims
- 3667US11354768B2Intelligent graphics dispatching mechanismINTEL CORP·Filed 2020·Granted Jun 7, 2022·0 cites·20 claims
- 3767US11263152B2Replacement policies for a hybrid hierarchical cacheINTEL CORP·Filed 2020·Granted Mar 1, 2022·0 cites·20 claims
- 3867US10089115B2Apparatus to optimize GPU thread shared local memory accessINTEL CORP·Filed 2016·Granted Oct 2, 2018·1 cites·21 claims
- 3966US11176083B2Switching crossbar for graphics pipelineINTEL CORP·Filed 2020·Granted Nov 16, 2021·0 cites·20 claims
- 4066US10657618B2Coarse grain coherencyINTEL CORP·Filed 2019·Granted May 19, 2020·0 cites·20 claims
- 4165US11301384B2Partial write management in a multi-tiled compute engineINTEL CORP·Filed 2020·Granted Apr 12, 2022·0 cites·21 claims
- 4265US11227360B2Thread scheduling over compute blocks for power optimizationINTEL CORP·Filed 2019·Granted Jan 18, 2022·0 cites·14 claims
- 4365US10796667B2Register spill/fill using shared local memory spaceINTEL CORP·Filed 2019·Granted Oct 6, 2020·0 cites·17 claims
- 4464US10565675B2Intelligent graphics dispatching mechanismINTEL CORP·Filed 2019·Granted Feb 18, 2020·0 cites·25 claims
- 4563US12164952B2Barrier state save and restore for preemption in a graphics environmentINTEL CORP·Filed 2021·Granted Dec 10, 2024·0 cites·25 claims
- 4663US10691617B2Replacement policies for a hybrid hierarchical cacheINTEL CORP·Filed 2018·Granted Jun 23, 2020·0 cites·21 claims
- 4762US10884932B2Independent and separate entity-based cacheINTEL CORP·Filed 2019·Granted Jan 5, 2021·0 cites·21 claims
- 4862US10853132B2Memory-based software barriersINTEL CORP·Filed 2019·Granted Dec 1, 2020·0 cites·17 claims
- 4961US11175949B2Microcontroller-based flexible thread scheduling launching in computing environmentsINTEL CORP·Filed 2019·Granted Nov 16, 2021·0 cites·20 claims
- 5060US11288191B1Range based flushing mechanismINTEL CORP·Filed 2020·Granted Mar 29, 2022·0 cites·17 claims
Showing the top 50 of 81 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →