Inventor · disambiguated record
James M. Van Dyke
Also filed as: VAN DYKE JAMES · VAN DYKE JAMES M
47 granted patents·3 pending applications·2,175 citations·filing 2000–2023
99Inventor score
Top patents by PatentIndex Score
50 records- 0199US7805587B1Memory addressing controlled by PTE fieldsNVIDIA CORP·Filed 2006·Granted Sep 28, 2010·440 cites·20 claims
- 0298US8072463B1Graphics system with virtual memory pages and non-power of two number of memory elementsVAN DYKE JAMES M·Filed 2006·Granted Dec 6, 2011·108 cites·20 claims
- 0398US7872657B1Memory addressing scheme using partition stridesNVIDIA CORP·Filed 2006·Granted Jan 18, 2011·42 cites·20 claims
- 0498US6825847B1System and method for real-time compression of pixel colorsNVIDIA CORP·Filed 2001·Granted Nov 30, 2004·156 cites·66 claims
- 0598US6734861B1System, method and article of manufacture for an interlock module in a computer graphics processing pipelineNVIDIA CORP·Filed 2000·Granted May 11, 2004·160 cites·18 claims
- 0698US6646639B1Modified method and apparatus for improved occlusion culling in graphics systemsNVIDIA CORP·Filed 2001·Granted Nov 11, 2003·196 cites·17 claims
- 0797US6894689B1Occlusion culling method and apparatus for graphics systemsNVIDIA CORP·Filed 2003·Granted May 17, 2005·115 cites·94 claims
- 0897US6853382B1Controller for a memory system having multiple partitionsNVIDIA CORP·Filed 2000·Granted Feb 8, 2005·114 cites·36 claims
- 0995US10909033B1Techniques for efficiently partitioning memoryNVIDIA CORP·Filed 2019·Granted Feb 2, 2021·14 cites·21 claims
- 1095US6961057B1Method and apparatus for managing and accessing depth data in a computer graphics systemNVIDIA CORP·Filed 2000·Granted Nov 1, 2005·114 cites·43 claims
- 1194US7932912B1Frame buffer tag addressing for partitioned graphics memory supporting non-power of two number of memory elementsNVIDIA CORP·Filed 2006·Granted Apr 26, 2011·34 cites·22 claims
- 1293US7068272B1System, method and article of manufacture for Z-value and stencil culling prior to rendering in a computer graphics processing pipelineNVIDIA CORP·Filed 2000·Granted Jun 27, 2006·129 cites·67 claims
- 1392US7596647B1Urgency based arbiterNVIDIA CORP·Filed 2006·Granted Sep 29, 2009·26 cites·23 claims
- 1492US7080194B1Method and system for memory access arbitration for minimizing read/write turnaround penaltiesNVIDIA CORP·Filed 2004·Granted Jul 18, 2006·64 cites·40 claims
- 1591US8698814B1Programmable compute engine screen mappingVAN DYKE JAMES M·Filed 2009·Granted Apr 15, 2014·10 cites·21 claims
- 1690US7340577B1Method and system for efficiently executing reads after writes in a memory employing delayed write dataNVIDIA CORP·Filed 2002·Granted Mar 4, 2008·65 cites·39 claims
- 1789US9424201B2Migrating pages of different sizes between heterogeneous processorsNVIDIA CORP·Filed 2013·Granted Aug 23, 2016·10 cites·22 claims
- 1889US7808507B1Compression tag state interlockNVIDIA CORP·Filed 2006·Granted Oct 5, 2010·8 cites·18 claims
- 1989US6999088B1Memory system having multiple subpartitionsNVIDIA CORP·Filed 2003·Granted Feb 14, 2006·36 cites·27 claims
- 2088US8271746B1Tiering of linear clientsHUTSELL BRIAN D·Filed 2006·Granted Sep 18, 2012·27 cites·26 claims
- 2187US11593476B2Data breach score and methodBREACH CLARITY INC·Filed 2018·Granted Feb 28, 2023·6 cites·18 claims
- 2287US7884829B1Partitioned graphics memory supporting non-power of two number of memory elementsNVIDIA CORP·Filed 2006·Granted Feb 8, 2011·16 cites·2 claims
- 2387US7617368B2Memory interface with independent arbitration of precharge, activate, and read/writeNVIDIA CORP·Filed 2006·Granted Nov 10, 2009·17 cites·18 claims
- 2486US8700865B1Compressed data access system and methodVAN DYKE JAMES M·Filed 2006·Granted Apr 15, 2014·15 cites·19 claims
- 2586US8441495B1Compression tag state interlockVAN DYKE JAMES M·Filed 2009·Granted May 14, 2013·6 cites·12 claims
- 2686US6647456B1High bandwidth-low latency memory controllerNVIDIA CORP·Filed 2001·Granted Nov 11, 2003·42 cites·56 claims
- 2785US8711161B1Functional component compensation reconfiguration system and methodSCOTZNIOVSKY STEFAN·Filed 2006·Granted Apr 29, 2014·28 cites·20 claims
- 2885US7680992B1Read-modify-write memory with low latency for critical requestsNVIDIA CORP·Filed 2006·Granted Mar 16, 2010·14 cites·20 claims
- 2985US7400327B1Apparatus, system, and method for a partitioned memoryNVIDIA CORP·Filed 2005·Granted Jul 15, 2008·5 cites·30 claims
- 3084US11768934B2Data breach system and methodBREACH CLARITY INC·Filed 2020·Granted Sep 26, 2023·3 cites·20 claims
- 3183US9798487B2Migrating pages of different sizes between heterogeneous processorsNVIDIA CORP·Filed 2016·Granted Oct 24, 2017·3 cites·27 claims
- 3282US8139073B1Early compression tag lookup for memory accessesVAN DYKE JAMES M·Filed 2006·Granted Mar 20, 2012·13 cites·20 claims
- 3381US7882292B1Urgency based arbiterNVIDIA CORP·Filed 2009·Granted Feb 1, 2011·8 cites·23 claims
- 3480US8775112B2System and method for increasing die yieldVAN DYKE JAMES M·Filed 2003·Granted Jul 8, 2014·17 cites·16 claims
- 3579US7603503B1Efficiency based arbiterNVIDIA CORP·Filed 2006·Granted Oct 13, 2009·7 cites·19 claims
- 3679US7369133B1Apparatus, system, and method for a partitioned memory for a graphics systemNVIDIA CORP·Filed 2005·Granted May 6, 2008·3 cites·26 claims
- 3779US7286134B1System and method for packing data in a tiled graphics memoryNVIDIA CORP·Filed 2003·Granted Oct 23, 2007·25 cites·21 claims
- 3879US6829689B1Method and system for memory access arbitration for minimizing read/write turnaround penaltiesNVIDIA CORP·Filed 2002·Granted Dec 7, 2004·23 cites·47 claims
- 3975US8768642B2System and method for remotely configuring semiconductor functional circuitsDIAMOND MICHAEL B·Filed 2003·Granted Jul 1, 2014·12 cites·17 claims
- 4075US7525551B1Anisotropic texture prefilteringNVIDIA CORP·Filed 2004·Granted Apr 28, 2009·20 cites·23 claims
- 4173US9348751B2System and methods for distributing a power-of-two virtual memory page across a non-power-of two number of DRAM partitionsVAN DYKE JAMES M·Filed 2010·Granted May 24, 2016·3 cites·20 claims
- 4270US8872833B2Integrated circuit configuration system and methodVAN DYKE JAMES M·Filed 2003·Granted Oct 28, 2014·9 cites·34 claims
- 4364US11429534B2Addressing cache slices in a last level cacheNVIDIA CORP·Filed 2021·Granted Aug 30, 2022·0 cites·36 claims
- 4463US6957298B1System and method for a high bandwidth-low latency memory controllerNVIDIA CORP·Filed 2003·Granted Oct 18, 2005·7 cites·26 claims
- 4562US8788996B2System and method for configuring semiconductor functional circuitsDIAMOND MICHAEL B·Filed 2003·Granted Jul 22, 2014·5 cites·31 claims
- 4659US10983919B2Addressing cache slices in a last level cacheNVIDIA CORP·Filed 2019·Granted Apr 20, 2021·0 cites·20 claims
- 4757US2024012906A1Data breach system and methodSONTIQ INC·Filed 2023·Application pending·0 cites
- 4851US9690715B2Selecting hash values based on matrix rankNVIDIA CORP·Filed 2014·Granted Jun 27, 2017·0 cites·21 claims
- 4947US2015193358A1Prioritized Memory ReadsNVIDIA CORP·Filed 2014·Application pending·0 cites
- 5037US2018121287A1Inline error detection and correction techniquesNVIDIA CORP·Filed 2016·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →