Inventor · disambiguated record
James Vash
Also filed as: VASH JAMES · VASH JAMES R
45 granted patents·6 pending applications·102 citations·filing 2004–2025
97Inventor score
Technology areasG06F
Top patents by PatentIndex Score
51 records- 0196US11544193B2Scalable cache coherency protocolAPPLE INC·Filed 2021·Granted Jan 3, 2023·8 cites·20 claims
- 0295US11934265B2Memory error tracking and loggingAPPLE INC·Filed 2022·Granted Mar 19, 2024·4 cites·20 claims
- 0393US11675722B2Multiple independent on-chip interconnectAPPLE INC·Filed 2021·Granted Jun 13, 2023·5 cites·22 claims
- 0489US11803471B2Scalable system on a chipAPPLE INC·Filed 2022·Granted Oct 31, 2023·1 cites·22 claims
- 0586US8904079B2Tunneling platform management messages through inter-processor interconnectsCHANG LUKE·Filed 2012·Granted Dec 2, 2014·12 cites·22 claims
- 0685US11210104B1Coprocessor context priorityAPPLE INC·Filed 2020·Granted Dec 28, 2021·2 cites·18 claims
- 0785US8359436B2Core snoop handling during performance state and power state transitions in a distributed caching agentINTEL CORP·Filed 2009·Granted Jan 22, 2013·19 cites·7 claims
- 0884US9323316B2Dynamically controlling interconnect frequency in a processorBHANDARU MALINI K·Filed 2012·Granted Apr 26, 2016·8 cites·13 claims
- 0983US2025278366A1Scalable Cache Coherency ProtocolAPPLE INC·Filed 2025·Application pending·0 cites
- 1082US12399830B2Scalable system on a chipAPPLE INC·Filed 2024·Granted Aug 26, 2025·0 cites·20 claims
- 1182US12332792B2Scalable cache coherency protocolAPPLE INC·Filed 2024·Granted Jun 17, 2025·0 cites·20 claims
- 1282US8694736B2Satisfying memory ordering requirements between partial reads and non-snoop accessesBEERS ROBERT H·Filed 2012·Granted Apr 8, 2014·5 cites·20 claims
- 1381US2024370371A1Scalable System on a ChipAPPLE INC·Filed 2024·Application pending·0 cites
- 1480US10725920B2Processors having virtually clustered cores and cache slicesINTEL CORP·Filed 2018·Granted Jul 28, 2020·2 cites·26 claims
- 1580US10705960B2Processors having virtually clustered cores and cache slicesINTEL CORP·Filed 2018·Granted Jul 7, 2020·2 cites·21 claims
- 1680US10127153B1Cache dependency handlingAPPLE INC·Filed 2015·Granted Nov 13, 2018·3 cites·18 claims
- 1780US9170946B2Directory cache supporting non-atomic input/output operationsHUM HERBERT H·Filed 2012·Granted Oct 27, 2015·9 cites·16 claims
- 1877US12253913B2Memory error tracking and loggingAPPLE INC·Filed 2024·Granted Mar 18, 2025·0 cites·20 claims
- 1977US11868258B2Scalable cache coherency protocolAPPLE INC·Filed 2023·Granted Jan 9, 2024·0 cites·20 claims
- 2077US2025278274A1DSB Operation with Excluded RegionAPPLE INC·Filed 2025·Application pending·0 cites
- 2176US11947457B2Scalable cache coherency protocolAPPLE INC·Filed 2022·Granted Apr 2, 2024·0 cites·19 claims
- 2276US11934313B2Scalable system on a chipAPPLE INC·Filed 2022·Granted Mar 19, 2024·0 cites·21 claims
- 2375US12487927B2Remote cache invalidationAPPLE INC·Filed 2024·Granted Dec 2, 2025·0 cites·18 claims
- 2475US12321746B2DSB operation with excluded regionAPPLE INC·Filed 2023·Granted Jun 3, 2025·0 cites·21 claims
- 2575US12007895B2Scalable system on a chipAPPLE INC·Filed 2022·Granted Jun 11, 2024·0 cites·25 claims
- 2675US10725919B2Processors having virtually clustered cores and cache slicesINTEL CORP·Filed 2018·Granted Jul 28, 2020·1 cites·22 claims
- 2775US8250311B2Satisfying memory ordering requirements between partial reads and non-snoop accessesBEERS ROBERT H·Filed 2008·Granted Aug 21, 2012·5 cites·15 claims
- 2874US12468644B2Invalidation of permission information stored by another processorAPPLE INC·Filed 2024·Granted Nov 11, 2025·0 cites·20 claims
- 2973US8868951B2Multiple-queue multiple-resource entry sleep and wakeup for power savings and bandwidth conservation in a retry based pipelineVASH JAMES R·Filed 2010·Granted Oct 21, 2014·3 cites·23 claims
- 3073US8626968B2Inter-queue anti-starvation mechanism with dynamic deadlock avoidance in a retry based pipelineVASH JAMES R·Filed 2010·Granted Jan 7, 2014·3 cites·15 claims
- 3172US8554851B2Apparatus, system, and methods for facilitating one-way ordering of messagesVASH JAMES R·Filed 2010·Granted Oct 8, 2013·3 cites·16 claims
- 3271US8756349B2Inter-queue anti-starvation mechanism with dynamic deadlock avoidance in a retry based pipelineVASH JAMES R·Filed 2013·Granted Jun 17, 2014·2 cites·10 claims
- 3367US11720360B2DSB operation with excluded regionAPPLE INC·Filed 2021·Granted Aug 8, 2023·0 cites·20 claims
- 3467US9304922B2Inter-queue anti-starvation mechanism with dynamic deadlock avoidance in a retry based pipelineINTEL CORP·Filed 2014·Granted Apr 5, 2016·1 cites·21 claims
- 3566US10073779B2Processors having virtually clustered cores and cache slicesINTEL CORP·Filed 2012·Granted Sep 11, 2018·1 cites·21 claims
- 3665US9207753B2Multiple-queue multiple-resource entry sleep and wakeup for power savings and bandwidth conservation in a retry based pipelineINTEL CORP·Filed 2014·Granted Dec 8, 2015·1 cites·24 claims
- 3761US12277074B1Mechanisms to utilize communication fabric via multi-port architectureAPPLE INC·Filed 2023·Granted Apr 15, 2025·0 cites·20 claims
- 3861US11768690B2Coprocessor context priorityAPPLE INC·Filed 2021·Granted Sep 26, 2023·0 cites·20 claims
- 3960US10019366B2Satisfying memory ordering requirements between partial reads and non-snoop accessesINTEL CORP·Filed 2017·Granted Jul 10, 2018·0 cites·6 claims
- 4059US9703712B2Satisfying memory ordering requirements between partial reads and non-snoop accessesINTEL CORP·Filed 2014·Granted Jul 11, 2017·0 cites·16 claims
- 4157US9058271B2Satisfying memory ordering requirements between partial reads and non-snoop accessesINTEL CORP·Filed 2013·Granted Jun 16, 2015·0 cites·19 claims
- 4257US8301907B2Supporting advanced RAS features in a secured computing systemNATU MAHESH S·Filed 2007·Granted Oct 30, 2012·1 cites·12 claims
- 4355US9288260B2Apparatus, system, and methods for facilitating one-way ordering of messagesINTEL CORP·Filed 2013·Granted Mar 15, 2016·0 cites·19 claims
- 4454US10795818B1Method and apparatus for ensuring real-time snoop latencyAPPLE INC·Filed 2019·Granted Oct 6, 2020·0 cites·20 claims
- 4551US8943379B2Retry based protocol with source/receiver FIFO recovery and anti-starvation mechanism to support dynamic pipeline lengthening for ECC error correctionVASH JAMES R·Filed 2010·Granted Jan 27, 2015·1 cites·11 claims
- 4649US8769211B2Monitoring thread synchronization in a distributed cacheVASH JAMES R·Filed 2009·Granted Jul 1, 2014·0 cites·12 claims
- 4747US2011161585A1Processing non-ownership load requests hitting modified line in cache of a different processorKOTTAPALLI SAILESH·Filed 2009·Application pending·0 cites
- 4844US11500638B1Hardware compression and decompression engineAPPLE INC·Filed 2020·Granted Nov 15, 2022·0 cites·17 claims
- 4944US8443148B2System-wide quiescence and per-thread transaction fence in a distributed caching agentVASH JAMES R·Filed 2010·Granted May 14, 2013·0 cites·20 claims
- 5044US2006026371A1Method and apparatus for implementing memory order models with order vectorsCHRYSOS GEORGE Z·Filed 2004·Application pending·0 cites
Showing the top 50 of 51 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →