Inventor · disambiguated record
James Vinh
Also filed as: VINH JAMES
8 granted patents·3 pending applications·84 citations·filing 1999–2011
85Inventor score
Top patents by PatentIndex Score
11 records- 0192US8656401B2Method and apparatus for prioritizing processor scheduler queue operationsVENKATARAMANAN GANESH·Filed 2011·Granted Feb 18, 2014·36 cites·22 claims
- 0273US6407585B1Method and apparatus for a family of self clocked dynamic circuitsFUJITSU LTD·Filed 2000·Granted Jun 18, 2002·18 cites·18 claims
- 0365US6348824B1High speed static latchFUJITSU LTD·Filed 2000·Granted Feb 19, 2002·15 cites·6 claims
- 0463US8787058B2Selectable multi-way comparatorVENKATARAMANAN GANESH·Filed 2011·Granted Jul 22, 2014·3 cites·12 claims
- 0560US6603333B2Method and apparatus for reduction of noise sensitivity in dynamic logic circuitsFUJITSU LTD·Filed 2000·Granted Aug 5, 2003·10 cites·10 claims
- 0637US2013042089A1Word line late kill in schedulerADVANCED MICRO DEVICES INC·Filed 2011·Application pending·0 cites
- 0735US2012144393A1Multi-issue unified integer schedulerVINH JAMES·Filed 2010·Application pending·0 cites
- 0832US8570783B2Low power content-addressable memory and methodVENKATARAMANAN GANESH·Filed 2010·Granted Oct 29, 2013·0 cites·30 claims
- 0932US6249147B1Method and apparatus for high speed on-chip signal propagationFUJITSU LTD·Filed 1999·Granted Jun 19, 2001·2 cites·59 claims
- 1024US8461877B2CMOS circuit with dynamic parasitic net pulldown circuitVIAU KYLE S·Filed 2011·Granted Jun 11, 2013·0 cites·18 claims
- 1120US2012140541A1Memory built-in self test scheme for content addressable memory arrayVIAU KYLE S·Filed 2010·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →