Inventor · disambiguated record
Jae-Yoon Yoo
Also filed as: YOO JAE YOON
19 granted patents·8 pending applications·313 citations·filing 2000–2024
94Inventor score
Top patents by PatentIndex Score
27 records- 0193US6835621B2Method of fabricating non-volatile memory device having a structure of silicon-oxide-nitride-oxide-siliconSAMSUNG ELECTRONICS CO LTD·Filed 2003·Granted Dec 28, 2004·69 cites·9 claims
- 0290US6383877B1Method of forming T-shaped isolation layer, method of forming elevated salicide source/drain region using the same, and semiconductor device having T-shaped isolation layerSAMSUNG ELECTRONICS CO LTD·Filed 2000·Granted May 7, 2002·49 cites·10 claims
- 0389US7385247B2At least penta-sided-channel type of FinFET transistorSAMSUNG ELECTRONICS CO LTD·Filed 2004·Granted Jun 10, 2008·46 cites·27 claims
- 0489US6486039B2Method of fabricating a trench isolation structure having sidewall oxide layers with different thicknessesSAMSUNG ELECTRONICS CO LTD·Filed 2001·Granted Nov 26, 2002·53 cites·16 claims
- 0587US7723193B2Method of forming an at least penta-sided-channel type of FinFET transistorSAMSUNG ELECTRONICS CO LTD·Filed 2008·Granted May 25, 2010·13 cites·16 claims
- 0684US6624496B2Method of forming T-shaped isolation layer, method of forming elevated salicide source/drain region using the same, and semiconductor device having T-shaped isolation layerSAMSUNG ELECTRONICS CO LTD·Filed 2002·Granted Sep 23, 2003·29 cites·6 claims
- 0783US11159722B2Method for processing image signal, image signal processor, and image sensor chipSK HYNIX INC·Filed 2019·Granted Oct 26, 2021·4 cites·17 claims
- 0881US7033895B2Method of fabricating a MOS transistor with elevated source/drain structure using a selective epitaxial growth processSAMSUNG ELECTRONICS CO LTD·Filed 2004·Granted Apr 25, 2006·22 cites·24 claims
- 0972US7439596B2Transistors for semiconductor device and methods of fabricating the sameSAMSUNG ELECTRONICS CO LTD·Filed 2005·Granted Oct 21, 2008·5 cites·9 claims
- 1070US7618868B2Method of manufacturing field effect transistors using sacrificial blocking layersSAMSUNG ELECTRONICS CO LTD·Filed 2006·Granted Nov 17, 2009·3 cites·8 claims
- 1166US6878575B2Method of forming gate oxide layer in semiconductor devicesSAMSUNG ELECTRONICS CO LTD·Filed 2003·Granted Apr 12, 2005·11 cites·15 claims
- 1263US12008789B2Image sensing device and method of operating the sameSK HYNIX INC·Filed 2021·Granted Jun 11, 2024·0 cites·20 claims
- 1360US2024320788A1Image signal processor and method for processing image signalSK HYNIX INC·Filed 2024·Application pending·0 cites
- 1459US12401917B2Image processing device and image correcting methodSK HYNIX INC·Filed 2023·Granted Aug 26, 2025·0 cites·26 claims
- 1556US6987310B2Multi-layered structure including an epitaxial layer having a low dislocation defect density, semiconductor device comprising the same, and method of fabricating the semiconductor deviceSAMSUNG ELECTRONICS CO LTD·Filed 2004·Granted Jan 17, 2006·4 cites·24 claims
- 1651US7368792B2MOS transistor with elevated source/drain structureSAMSUNG ELECTRONICS CO LTD·Filed 2006·Granted May 6, 2008·0 cites·11 claims
- 1750US11736812B2Image sensing device for correcting image using block areas and method of operating the sameSK HYNIX INC·Filed 2021·Granted Aug 22, 2023·0 cites·18 claims
- 1849US11451752B2Grid gain calculation circuit, image sensing device and operation method of the sameSK HYNIX INC·Filed 2020·Granted Sep 20, 2022·0 cites·20 claims
- 1949US7101776B2Method of fabricating MOS transistor using total gate silicidation processSAMSUNG ELECTRONICS CO LTD·Filed 2004·Granted Sep 5, 2006·4 cites·99 claims
- 2049US2024249382A1Image processing device and pixel interpolation methodSK HYNIX INC·Filed 2023·Application pending·0 cites
- 2147US2009020845A1Shallow trench isolation structures for semiconductor devices including doped oxide film liners and methods of manufacturing the sameSAMSUNG ELECTRONICS CO LTD·Filed 2008·Application pending·0 cites
- 2247US2006183296A1Isolation method for semiconductor deviceYOO JAE-YOON·Filed 2006·Application pending·0 cites
- 2341US7084041B2Bipolar device and method of manufacturing the same including pre-treatment using germane gasSAMSUNG ELECTRONICS CO LTD·Filed 2004·Granted Aug 1, 2006·1 cites·15 claims
- 2441US2008121985A1Structure and method to improve short channel effects in metal oxide semiconductor field effect transistorsIBM·Filed 2006·Application pending·0 cites
- 2541US2005274981A1Multi-layered structure including an epitaxial layer having a low dislocation defect density, semiconductor device comprising the same, and method of fabricating the semiconductor deviceLEE HO·Filed 2005·Application pending·0 cites
- 2639US2002197823A1Isolation method for semiconductor deviceFiled 2002·Application pending·0 cites
- 2738US2004005748A1Methods of forming a gate insulating layer in an integrated circuit device in which the gate insulating layer is nitrified and then annealed to cure defects caused by the nitridation processFiled 2003·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →