Inventor · disambiguated record
Jeong Yeol Choi
Also filed as: CHOI JEONG · CHOI JEONG Y · CHOI JEONG-YEOL
27 granted patents·1 pending application·629 citations·filing 1990–2006
97Inventor score
Top patents by PatentIndex Score
28 records- 0188US5793088AStructure for controlling threshold voltage of MOSFETINTEGRATED DEVICE TECH·Filed 1996·Granted Aug 11, 1998·98 cites·21 claims
- 0284US5888861AMethod of manufacturing a BiCMOS integrated circuit fully integrated within a CMOS process flowINTEGRATED DEVICE TECH·Filed 1997·Granted Mar 30, 1999·61 cites·29 claims
- 0383US7316537B2Substrate transport apparatusSEMES CO LTD·Filed 2005·Granted Jan 8, 2008·9 cites·9 claims
- 0480US6894356B2SRAM system having very lightly doped SRAM load transistors for improving SRAM cell stability and method for making the sameINTEGRATED DEVICE TECH·Filed 2002·Granted May 17, 2005·21 cites·17 claims
- 0579US7378289B1Method for forming photomask having test patterns in blading areasINTEGRATED DEVICE TECH·Filed 2005·Granted May 27, 2008·9 cites·18 claims
- 0679US6496399B1Compact ternary content addressable memory cellINTEGRATED DEVICE TECH·Filed 2001·Granted Dec 17, 2002·27 cites·25 claims
- 0779US5780330ASelective diffusion process for forming both n-type and p-type gates with a single masking stepINTEGRATED DEVICE TECH·Filed 1996·Granted Jul 14, 1998·58 cites·29 claims
- 0872US6191460B1Identical gate conductivity type static random access memory cellINTEGRATED DEVICE TECH·Filed 1999·Granted Feb 20, 2001·28 cites·11 claims
- 0972US6069054AMethod for forming isolation regions subsequent to gate formation and structure thereofINTEGRATED DEVICE TECH·Filed 1997·Granted May 30, 2000·44 cites·11 claims
- 1068US5679588AMethod for fabricating P-wells and N-wells having optimized field and active regionsINTEGRATED DEVICE TECH·Filed 1995·Granted Oct 21, 1997·32 cites·8 claims
- 1166US5831313AStructure for improving latch-up immunity and interwell isolation in a semiconductor deviceINTEGRATED DEVICE TECH·Filed 1996·Granted Nov 3, 1998·35 cites·17 claims
- 1265US5654213AMethod for fabricating a CMOS deviceINTEGRATED DEVICE TECH·Filed 1995·Granted Aug 5, 1997·26 cites·39 claims
- 1363US5128731AStatic random access memory cell using a P/N-MOS transistorsINTEGRATED DEVICE TECH·Filed 1990·Granted Jul 7, 1992·22 cites·8 claims
- 1459US5393677AMethod of optimizing wells for PMOS and bipolar to yield an improved BICMOS processINTEGRATED DEVICE TECH·Filed 1993·Granted Feb 28, 1995·19 cites·1 claims
- 1557US6165918AMethod for forming gate oxides of different thicknessesINTEGRATED DEVICE TECH·Filed 1999·Granted Dec 26, 2000·19 cites·14 claims
- 1655US6407008B1Method of forming an oxide layerINTEGRATED DEVICE TECH·Filed 2000·Granted Jun 18, 2002·6 cites·21 claims
- 1753US7125775B1Method for forming hybrid device gatesINTEGRATED DEVICE TECH·Filed 2004·Granted Oct 24, 2006·5 cites·12 claims
- 1851US6898561B1Methods, apparatus and computer program products for modeling integrated circuit devices having reduced linewidthsINTEGRATED DEVICE TECH·Filed 1999·Granted May 24, 2005·25 cites·20 claims
- 1950US6063676AMosfet with raised source and drain regionsINTEGRATED DEVICE TECH·Filed 1997·Granted May 16, 2000·17 cites·9 claims
- 2049US6258693B1Ion implantation for scalability of isolation in an integrated circuitINTEGRATED DEVICE TECH·Filed 1997·Granted Jul 10, 2001·16 cites·8 claims
- 2148US6127710ACMOS structure having a gate without spacersINTEGRATED DEVICE TECH·Filed 1997·Granted Oct 3, 2000·11 cites·10 claims
- 2246US5750424AMethod for fabricating a CMOS deviceINTEGRATED DEVICE TECH·Filed 1996·Granted May 12, 1998·10 cites·17 claims
- 2343US6017785AMethod for improving latch-up immunity and interwell isolation in a semiconductor deviceINTEGRATED DEVICE TECH·Filed 1996·Granted Jan 25, 2000·8 cites·31 claims
- 2443US5830789ACMOS process forming wells after gate formationINTEGRATED DEVICE TECH·Filed 1996·Granted Nov 3, 1998·8 cites·11 claims
- 2543US2009108545A1Spin chuckSEMES CO LTD·Filed 2006·Application pending·0 cites
- 2640US6103555AMethod of improving the reliability of low-voltage programmable antifuseINTEGRATED DEVICE TECH·Filed 1996·Granted Aug 15, 2000·8 cites·19 claims
- 2737US6043129AHigh density MOSFET with raised source and drain regionsINTEGRATED DEVICE TECH·Filed 1997·Granted Mar 28, 2000·6 cites·57 claims
- 2831US5926704AEfficient method for fabricating P-wells and N-wellsINTEGRATED DEVICE TECH·Filed 1997·Granted Jul 20, 1999·1 cites·8 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →