Inventor · disambiguated record
Jeffrey J. Holm
Also filed as: HOLM JEFFREY · HOLM JEFFREY J
14 granted patents·1 pending application·417 citations·filing 1998–2012
94Inventor score
Top patents by PatentIndex Score
15 records- 0184US7000092B2Heterogeneous multi-processor reference designLSI LOGIC CORP·Filed 2002·Granted Feb 14, 2006·40 cites·10 claims
- 0282US6633944B1AHB segmentation bridge between busses having different native data widthsLSI LOGIC CORP·Filed 2001·Granted Oct 14, 2003·37 cites·20 claims
- 0381US7257762B2Memory interface with write buffer and encoderLSI CORP·Filed 2004·Granted Aug 14, 2007·36 cites·19 claims
- 0480US6687255B1Data communication circuit having FIFO buffer with frame-in-FIFO generatorLSI LOGIC CORP·Filed 2000·Granted Feb 3, 2004·48 cites·16 claims
- 0579US6981088B2System and method of transferring data words between master and slave devicesLSI LOGIC CORP·Filed 2003·Granted Dec 27, 2005·33 cites·17 claims
- 0678US7007201B1Shared embedded trace macrocellLSI LOGIC CORP·Filed 2001·Granted Feb 28, 2006·39 cites·15 claims
- 0778US6622183B1Data transmission buffer having frame counter feedback for re-transmitting aborted data framesLSI LOGIC CORP·Filed 2000·Granted Sep 16, 2003·27 cites·14 claims
- 0874US7000045B2Byte-enabled transfer for a data bus having fixed-byte data transferLSI LOGIC CORP·Filed 2002·Granted Feb 14, 2006·22 cites·19 claims
- 0965US6105086AData communication circuit and method for buffering data between a shared resource and multiple interfacesLSI LOGIC CORP·Filed 1998·Granted Aug 15, 2000·54 cites·13 claims
- 1062US6785755B1Grant removal via dummy master arbitrationLSI LOGIC CORP·Filed 2001·Granted Aug 31, 2004·9 cites·20 claims
- 1160US6745273B1Automatic deadlock prevention via arbitration switchingLSI LOGIC CORP·Filed 2001·Granted Jun 1, 2004·11 cites·20 claims
- 1255US6122680AMultiple channel data communication buffer with separate single port transmit and receive memories having a unique channel for each communication port and with fixed arbitrationLSI LOGIC CORP·Filed 1998·Granted Sep 19, 2000·35 cites·15 claims
- 1344US6087867ATransaction control circuit for synchronizing transactions across asynchronous clock domainsLSI LOGIC CORP·Filed 1998·Granted Jul 11, 2000·18 cites·10 claims
- 1439US6301264B1Asynchronous data conversion circuitLSI LOGIC CORP·Filed 1998·Granted Oct 9, 2001·8 cites·19 claims
- 1538US2014032814A1Hybrid storage device having disk controller with high-speed serial port to non-volatile memory bridgeFISHER DANIEL S·Filed 2012·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →