Inventor · disambiguated record
Jerome B. Lasky
Also filed as: LASKY J · LASKY JEROME B · LASKY JEROME BRET
24 granted patents·1,139 citations·filing 1977–2008
97Inventor score
Top patents by PatentIndex Score
24 records- 0195US5675185ASemiconductor structure incorporating thin film transistors with undoped cap oxide layersIBM·Filed 1995·Granted Oct 7, 1997·123 cites·24 claims
- 0295US5291439ASemiconductor memory cell and memory array with inversion layerIBM·Filed 1991·Granted Mar 1, 1994·158 cites·24 claims
- 0392US4601779AMethod of producing a thin silicon-on-insulator layerIBM·Filed 1985·Granted Jul 22, 1986·123 cites·27 claims
- 0490US4755478AMethod of forming metal-strapped polysilicon gate electrode for FET deviceIBM·Filed 1987·Granted Jul 5, 1988·106 cites·16 claims
- 0587US6541351B1Method for limiting divot formation in post shallow trench isolation processesIBM·Filed 2001·Granted Apr 1, 2003·53 cites·23 claims
- 0687US5226732AEmissivity independent temperature measurement systemsIBM·Filed 1992·Granted Jul 13, 1993·85 cites·20 claims
- 0787US4735679AMethod of improving silicon-on-insulator uniformityIBM·Filed 1987·Granted Apr 5, 1988·76 cites·23 claims
- 0884US4649627AMethod of fabricating silicon-on-insulator transistors with a shared elementIBM·Filed 1984·Granted Mar 17, 1987·55 cites·8 claims
- 0983US7405139B2Prevention of backside cracks in semiconductor chips or wafers using backside film or backside wet etchIBM·Filed 2006·Granted Jul 29, 2008·9 cites·5 claims
- 1083US4532700AMethod of manufacturing semiconductor structures having an oxidized porous silicon isolation layerIBM·Filed 1984·Granted Aug 6, 1985·52 cites·15 claims
- 1181US5434109AOxidation of silicon nitride in semiconductor devicesIBM·Filed 1993·Granted Jul 18, 1995·76 cites·17 claims
- 1280US4558508AProcess of making dual well CMOS semiconductor structure with aligned field-dopings using single masking stepIBM·Filed 1984·Granted Dec 17, 1985·48 cites·7 claims
- 1378US4379727AMethod of laser annealing of subsurface ion implanted regionsIBM·Filed 1981·Granted Apr 12, 1983·52 cites·9 claims
- 1475US6472232B1Semiconductor temperature monitorIBM·Filed 2000·Granted Oct 29, 2002·16 cites·14 claims
- 1573US7495254B2Test structure and method for detecting and studying crystal lattice dislocation defects in integrated circuit devicesIBM·Filed 2005·Granted Feb 24, 2009·4 cites·20 claims
- 1665US6255179B1Plasma etch pre-silicide cleanIBM·Filed 1999·Granted Jul 3, 2001·24 cites·26 claims
- 1765US6184132B1Integrated cobalt silicide process for semiconductor devicesIBM·Filed 1999·Granted Feb 6, 2001·22 cites·20 claims
- 1863US5888875ADiffusion resistor structure with silicided contact areas, and methods of fabrication thereofIBM·Filed 1997·Granted Mar 30, 1999·22 cites·14 claims
- 1962US4121010AThermoluminescent phosphorUS ENERGY·Filed 1977·Granted Oct 17, 1978·14 cites·7 claims
- 2061US6638629B2Semiconductor temperature monitorIBM·Filed 2002·Granted Oct 28, 2003·6 cites·11 claims
- 2153US7989358B2Prevention of backside cracks in semiconductor chips or wafers using backside film or backside wet etchIBM·Filed 2008·Granted Aug 2, 2011·0 cites·2 claims
- 2243US6121064ASTI fill for SOI which makes SOI inspectableIBM·Filed 1999·Granted Sep 19, 2000·12 cites·27 claims
- 2335US6793735B2Integrated cobalt silicide process for semiconductor devicesIBM·Filed 2000·Granted Sep 21, 2004·0 cites·17 claims
- 2435US4173660AMethod of preparing a thermoluminescent phosphorUS ENERGY·Filed 1978·Granted Nov 6, 1979·3 cites·8 claims
Join the waitlist — get patent alerts
Get an alert when Jerome B. Lasky files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →